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Re: [Qemu-ppc] Problem booting qemu-system-ppc with cpu e500XX and machi


From: Alexander Graf
Subject: Re: [Qemu-ppc] Problem booting qemu-system-ppc with cpu e500XX and machine mpc8544ds
Date: Wed, 4 Jul 2012 11:41:38 +0200

On 04.07.2012, at 11:37, Badrinath Sriman wrote:

> Alex,
> Thanks for the reply. qemu debug int option gives a continuously growing file 
> with the following lines:
> 
> Raise exception at 00297620 => 0000000d (00)

$ grep POWERPC_EXCP target-ppc/cpu.h | grep $(( 0xd ))
    POWERPC_EXCP_DTLB     = 13, /* Data TLB miss                             */

> invalid/unsupported opcode: 00 - 00 - 00 (00000000) 00000000 0
> Raise exception at 00000004 => 00000006 (21)
> Raise exception at 00000004 => 00000006 (21)
> Raise exception at 00000004 => 00000006 (21)
> Raise exception at 00000004 => 00000006 (21)
> ----------------
> ---------------
> 
> From the target-ppc/cpu.h exception definitions, error type 6 is a "Program 
> Exception" and Error code 0x21  is "POWERPC_EXCP_INVAL_INVAL   = 0x01,  /* 
> Invalid instruction   */.

Sure, that's the 0 instruction. It's the one before that you're interested in.

> 
> At the address 00297620, the instruction is
> 0x00297620: lbz     r0,0(r9)
> 
> Does it mean that the lbz instruction is not emulated? I saw in the qemu code 
> base that it was emulated.

No, it means that your guest is trying to access memory that is out of its 
initial TLB mapping, but it didn't set up IVPR+IVOR vectors to handle page 
faults yet.

Either try and see if it works with current git from 
git://git.qemu.org/qemu.git or check out mmubooke_create_initial_mapping in 
hw/ppce500_mpc8544ds.c and increase the map size.


Alex




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