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Re: [Qemu-ppc] [PATCH v2] openpic: Added BRR1 register
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] [PATCH v2] openpic: Added BRR1 register |
Date: |
Tue, 17 Jul 2012 10:36:05 +0200 |
On 17.07.2012, at 08:30, Bharat Bhushan wrote:
> Linux mpic driver uses (changes may be in pipeline to get upstreamed soon)
> BRR1. This patch adds the support to emulate readonly BRR1.
>
> Currently QEMU does not fully emulate any version on MPIC, so the MPIC
> Major number and Minor number are set to 0.
Hrm, I can't seem to find any mentioning of this register in the CPC945 spec
for example.
>
> Signed-off-by: Bharat Bhushan <address@hidden>
> ---
> hw/openpic.c | 16 ++++++++++++++++
> 1 files changed, 16 insertions(+), 0 deletions(-)
>
> diff --git a/hw/openpic.c b/hw/openpic.c
> index 58ef871..aad2ee9 100644
> --- a/hw/openpic.c
> +++ b/hw/openpic.c
> @@ -130,6 +130,16 @@ enum {
> #define MPIC_CPU_REG_START 0x20000
> #define MPIC_CPU_REG_SIZE 0x100 + ((MAX_CPU - 1) * 0x1000)
>
> +/*
> + * Block Revision Register1 (BRR1): QEMU does not fully emulate
> + * any version on MPIC. So to start with, set the IP version to 0.
> + */
> +#define BRR1_IPID 0x00400000 /* IP-block ID */
Does this mean "FSL"?
Alex