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Re: [Qemu-ppc] [PATCH 04/15] ppc/booke: fix crit/mcheck/debug exceptions


From: Alexander Graf
Subject: Re: [Qemu-ppc] [PATCH 04/15] ppc/booke: fix crit/mcheck/debug exceptions
Date: Thu, 3 Jan 2013 18:57:09 +0100

On 22.12.2012, at 03:15, Scott Wood wrote:

> Book E does not play games with certain bits of xSRR1 being MSR save
> bits and others being error status.  xSRR1 is the old MSR, period.
> This was causing things like MSR[CE] to be lost, even in the saved
> version, as soon as you take an exception.
> 
> rfci/rfdi/rfmci are fixed to pass the actual xSRR1 register contents,
> rather than the register number.
> 
> Put FIXME comments on the hack that is "asrr0/1".  The whole point of
> separate exception levels is so that you can, for example, take a machine
> check or debug interrupt without corrupting critical-level operations.
> The right xSRR0/1 set needs to be chosen based on CPU type flags.
> 
> Signed-off-by: Scott Wood <address@hidden>

Thanks, applied to ppc-next.


Alex




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