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[Qemu-ppc] [PATCH 11/31] openpic: fix debug prints
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 11/31] openpic: fix debug prints |
Date: |
Mon, 7 Jan 2013 16:38:40 +0100 |
From: Scott Wood <address@hidden>
Fix various format errors when debug prints are enabled. Also
cause error checking to happen even when debug prints are not
enabled, and consistently use 0x for hex output.
Signed-off-by: Scott Wood <address@hidden>
[agraf: adjust for more recent code base, prettify DPRINTF macro]
Signed-off-by: Alexander Graf <address@hidden>
---
hw/openpic.c | 44 +++++++++++++++++++++++++++-----------------
1 files changed, 27 insertions(+), 17 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 55e96d1..9243e70 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -43,11 +43,17 @@
//#define DEBUG_OPENPIC
#ifdef DEBUG_OPENPIC
-#define DPRINTF(fmt, ...) do { printf(fmt , ## __VA_ARGS__); } while (0)
+static const int debug_openpic = 1;
#else
-#define DPRINTF(fmt, ...) do { } while (0)
+static const int debug_openpic = 0;
#endif
+#define DPRINTF(fmt, ...) do { \
+ if (debug_openpic) { \
+ printf(fmt , ## __VA_ARGS__); \
+ } \
+ } while (0)
+
#define MAX_CPU 15
#define MAX_SRC 256
#define MAX_TMR 4
@@ -422,7 +428,7 @@ static void openpic_set_irq(void *opaque, int n_IRQ, int
level)
IRQSource *src;
src = &opp->src[n_IRQ];
- DPRINTF("openpic: set irq %d = %d ipvp=%08x\n",
+ DPRINTF("openpic: set irq %d = %d ipvp=0x%08x\n",
n_IRQ, level, src->ipvp);
if (src->ipvp & IPVP_SENSE_MASK) {
/* level-sensitive irq */
@@ -513,7 +519,8 @@ static void openpic_gbl_write(void *opaque, hwaddr addr,
uint64_t val,
IRQDest *dst;
int idx;
- DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
+ __func__, addr, val);
if (addr & 0xF) {
return;
}
@@ -576,7 +583,7 @@ static uint64_t openpic_gbl_read(void *opaque, hwaddr addr,
unsigned len)
OpenPICState *opp = opaque;
uint32_t retval;
- DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
+ DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF) {
return retval;
@@ -623,7 +630,7 @@ static uint64_t openpic_gbl_read(void *opaque, hwaddr addr,
unsigned len)
default:
break;
}
- DPRINTF("%s: => %08x\n", __func__, retval);
+ DPRINTF("%s: => 0x%08x\n", __func__, retval);
return retval;
}
@@ -634,7 +641,8 @@ static void openpic_tmr_write(void *opaque, hwaddr addr,
uint64_t val,
OpenPICState *opp = opaque;
int idx;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
+ __func__, addr, val);
if (addr & 0xF) {
return;
}
@@ -672,7 +680,7 @@ static uint64_t openpic_tmr_read(void *opaque, hwaddr addr,
unsigned len)
uint32_t retval = -1;
int idx;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
if (addr & 0xF) {
goto out;
}
@@ -698,7 +706,7 @@ static uint64_t openpic_tmr_read(void *opaque, hwaddr addr,
unsigned len)
}
out:
- DPRINTF("%s: => %08x\n", __func__, retval);
+ DPRINTF("%s: => 0x%08x\n", __func__, retval);
return retval;
}
@@ -709,7 +717,8 @@ static void openpic_src_write(void *opaque, hwaddr addr,
uint64_t val,
OpenPICState *opp = opaque;
int idx;
- DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
+ __func__, addr, val);
if (addr & 0xF) {
return;
}
@@ -730,7 +739,7 @@ static uint64_t openpic_src_read(void *opaque, uint64_t
addr, unsigned len)
uint32_t retval;
int idx;
- DPRINTF("%s: addr %08x\n", __func__, addr);
+ DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF) {
return retval;
@@ -744,7 +753,7 @@ static uint64_t openpic_src_read(void *opaque, uint64_t
addr, unsigned len)
/* EXVP / IFEVP / IEEVP */
retval = read_IRQreg_ipvp(opp, idx);
}
- DPRINTF("%s: => %08x\n", __func__, retval);
+ DPRINTF("%s: => 0x%08x\n", __func__, retval);
return retval;
}
@@ -756,7 +765,8 @@ static void openpic_msi_write(void *opaque, hwaddr addr,
uint64_t val,
int idx = opp->irq_msi;
int srs, ibs;
- DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
+ DPRINTF("%s: addr %#" HWADDR_PRIx " <= 0x%08" PRIx64 "\n",
+ __func__, addr, val);
if (addr & 0xF) {
return;
}
@@ -781,7 +791,7 @@ static uint64_t openpic_msi_read(void *opaque, hwaddr addr,
unsigned size)
uint64_t r = 0;
int i, srs;
- DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
+ DPRINTF("%s: addr %#" HWADDR_PRIx "\n", __func__, addr);
if (addr & 0xF) {
return -1;
}
@@ -819,7 +829,7 @@ static void openpic_cpu_write_internal(void *opaque, hwaddr
addr,
IRQDest *dst;
int s_IRQ, n_IRQ;
- DPRINTF("%s: cpu %d addr " TARGET_FMT_plx " <= %08x\n", __func__, idx,
+ DPRINTF("%s: cpu %d addr %#" HWADDR_PRIx " <= 0x%08x\n", __func__, idx,
addr, val);
if (idx < 0) {
@@ -890,7 +900,7 @@ static uint32_t openpic_cpu_read_internal(void *opaque,
hwaddr addr,
uint32_t retval;
int n_IRQ;
- DPRINTF("%s: cpu %d addr " TARGET_FMT_plx "\n", __func__, idx, addr);
+ DPRINTF("%s: cpu %d addr %#" HWADDR_PRIx "\n", __func__, idx, addr);
retval = 0xFFFFFFFF;
if (idx < 0) {
@@ -958,7 +968,7 @@ static uint32_t openpic_cpu_read_internal(void *opaque,
hwaddr addr,
default:
break;
}
- DPRINTF("%s: => %08x\n", __func__, retval);
+ DPRINTF("%s: => 0x%08x\n", __func__, retval);
return retval;
}
--
1.6.0.2
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/31] ppc patch queue 2013-01-07, (continued)
- [Qemu-ppc] [PATCH 27/31] PPC: KVM: set has-idle in guest device tree, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 22/31] openpic: fix sense and priority bits, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 30/31] target-ppc: Error out for -cpu host on unknown PVR, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 15/31] openpic: rework critical interrupt support, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 11/31] openpic: fix debug prints,
Alexander Graf <=
- [Qemu-ppc] [PATCH 17/31] openpic/fsl: critical interrupts ignore mask before v4.1, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 13/31] ppc/booke: fix crit/mcheck/debug exceptions, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 12/31] openpic: lower interrupt when reading the MSI register, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 20/31] openpic: use standard bitmap operations, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 16/31] openpic: make ctpr signed, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 24/31] openpic: move IACK to its own function, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 25/31] openpic: fix CTPR and de-assertion of interrupts, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 14/31] openpic: make register names correspond better with hw docs, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 28/31] PPC: Bring EPR support closer to reality, Alexander Graf, 2013/01/07