[Qemu-ppc] [PATCH 10/32] target-ppc: Disentangle 64-bit hash version of cpu_get_phys_page_debug()

[David Gibson]

cpu_get_phys_page_debug() is a trivial wrapper around
get_physical_address().  But even the signature of get_physical_address()
has some things we'd like to clean up on a per-mmu basis, so this patch
moves the test on mmu model out to cpu_get_phys_page_debug(), moving the
version for 64-bit hash MMUs out to mmu-hash64.c.

Signed-off-by: David Gibson <address@hidden>
---
 target-ppc/cpu.h        |    3 +--
 target-ppc/mmu-hash64.c |   17 +++++++++++++++--
 target-ppc/mmu_helper.c |   20 ++++++++++++--------
 3 files changed, 28 insertions(+), 12 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index da01b06..f0c150d 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1153,8 +1153,7 @@ hwaddr get_pteg_offset(CPUPPCState *env, hwaddr hash, int 
pte_size);
 void ppc_store_asr (CPUPPCState *env, target_ulong value);
 int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
 void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
-int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
-                                    target_ulong eaddr, int rw, int 
access_type);
+hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
 int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
                                 int mmu_idx);
 #endif /* defined(TARGET_PPC64) */
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 20cebdc..fa13182 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -435,8 +435,9 @@ static int get_segment64(CPUPPCState *env, mmu_ctx_t *ctx,
     return ret;
 }
 
-int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
-                                    target_ulong eaddr, int rw, int 
access_type)
+static int ppc_hash64_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
+                                           target_ulong eaddr, int rw,
+                                           int access_type)
 {
     bool real_mode = (access_type == ACCESS_CODE && msr_ir == 0)
         || (access_type != ACCESS_CODE && msr_dr == 0);
@@ -450,6 +451,18 @@ int ppc_hash64_get_physical_address(CPUPPCState *env, 
mmu_ctx_t *ctx,
     }
 }
 
+hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
+{
+    mmu_ctx_t ctx;
+
+    if (unlikely(ppc_hash64_get_physical_address(env, &ctx, addr, 0, 
ACCESS_INT)
+                 != 0)) {
+        return -1;
+    }
+
+    return ctx.raddr & TARGET_PAGE_MASK;
+}
+
 int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
                                 int mmu_idx)
 {
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index a106cbc..3c4b39a 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1424,14 +1424,6 @@ static int get_physical_address(CPUPPCState *env, 
mmu_ctx_t *ctx,
         }
         break;
 
-#if defined(TARGET_PPC64)
-    case POWERPC_MMU_64B:
-    case POWERPC_MMU_2_06:
-    case POWERPC_MMU_2_06d:
-        ret = ppc_hash64_get_physical_address(env, ctx, eaddr, rw, 
access_type);
-        break;
-#endif
-
     case POWERPC_MMU_SOFT_4xx:
     case POWERPC_MMU_SOFT_4xx_Z:
         if (real_mode) {
@@ -1476,6 +1468,18 @@ hwaddr cpu_get_phys_page_debug(CPUPPCState *env, 
target_ulong addr)
 {
     mmu_ctx_t ctx;
 
+    switch (env->mmu_model) {
+#if defined(TARGET_PPC64)
+    case POWERPC_MMU_64B:
+    case POWERPC_MMU_2_06:
+    case POWERPC_MMU_2_06d:
+        return ppc_hash64_get_phys_page_debug(env, addr);
+#endif
+
+    default:
+        ;
+    }
+
     if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) {
         return -1;
     }
-- 
1.7.10.4