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[Qemu-ppc] [PATCH 46/48] target-ppc: Split user only code out of mmu_hel
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PATCH 46/48] target-ppc: Split user only code out of mmu_helper.c |
Date: |
Tue, 12 Mar 2013 21:31:48 +1100 |
mmu_helper.c is, for obvious reasons, almost entirely concerned with
softmmu builds of qemu. However, it does contain one stub function which
is used when CONFIG_USER_ONLY=y - the user only versoin of
cpu_ppc_handle_mmu_fault, which always triggers an exception. The entire
rest of the file is surrounded by #if !defined(CONFIG_USER_ONLY).
We clean this up by moving the user only stub into its own new file,
removing the ifdefs and building mmu_helper.c only when CONFIG_SOFTMMU
is set. This also lets us remove the #define of cpu_handle_mmu_fault to
cpu_ppc_handle_mmu_fault - that name is only used from generic code for
user only - so we just name our split user version by the generic name.
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/Makefile.objs | 4 ++--
target-ppc/cpu.h | 5 ++++-
target-ppc/mmu_helper.c | 28 --------------------------
target-ppc/user_only_helper.c | 44 +++++++++++++++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 31 deletions(-)
create mode 100644 target-ppc/user_only_helper.c
diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs
index c80911f..2c43c34 100644
--- a/target-ppc/Makefile.objs
+++ b/target-ppc/Makefile.objs
@@ -1,14 +1,14 @@
obj-y += cpu-models.o
obj-y += translate.o
ifeq ($(CONFIG_SOFTMMU),y)
-obj-y += machine.o mmu-hash32.o
+obj-y += machine.o mmu_helper.o mmu-hash32.o
obj-$(TARGET_PPC64) += mmu-hash64.o
endif
obj-$(CONFIG_KVM) += kvm.o kvm_ppc.o
obj-y += excp_helper.o
obj-y += fpu_helper.o
obj-y += int_helper.o
-obj-y += mmu_helper.o
obj-y += timebase_helper.o
obj-y += misc_helper.o
obj-y += mem_helper.o
+obj-$(CONFIG_USER_ONLY) += user_only_helper.o
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f42e184..b616a94 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1092,9 +1092,12 @@ int cpu_ppc_signal_handler (int host_signum, void *pinfo,
void *puc);
int cpu_ppc_handle_mmu_fault (CPUPPCState *env, target_ulong address, int rw,
int mmu_idx);
-#define cpu_handle_mmu_fault cpu_ppc_handle_mmu_fault
void do_interrupt (CPUPPCState *env);
void ppc_hw_interrupt (CPUPPCState *env);
+#if defined(CONFIG_USER_ONLY)
+int cpu_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+ int mmu_idx);
+#endif
#if !defined(CONFIG_USER_ONLY)
void ppc_store_sdr1 (CPUPPCState *env, target_ulong value);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index c780ce1..525eb6f 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -52,31 +52,6 @@
/*****************************************************************************/
/* PowerPC MMU emulation */
-#if defined(CONFIG_USER_ONLY)
-int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
- int mmu_idx)
-{
- int exception, error_code;
-
- if (rw == 2) {
- exception = POWERPC_EXCP_ISI;
- error_code = 0x40000000;
- } else {
- exception = POWERPC_EXCP_DSI;
- error_code = 0x40000000;
- if (rw) {
- error_code |= 0x02000000;
- }
- env->spr[SPR_DAR] = address;
- env->spr[SPR_DSISR] = error_code;
- }
- env->exception_index = exception;
- env->error_code = error_code;
-
- return 1;
-}
-
-#else
/* Context used internally during MMU translations */
typedef struct mmu_ctx_t mmu_ctx_t;
@@ -2027,9 +2002,7 @@ void helper_store_sr(CPUPPCState *env, target_ulong
srnum, target_ulong value)
#endif
}
}
-#endif /* !defined(CONFIG_USER_ONLY) */
-#if !defined(CONFIG_USER_ONLY)
/* TLB management */
void helper_tlbia(CPUPPCState *env)
{
@@ -2804,4 +2777,3 @@ void helper_booke206_tlbflush(CPUPPCState *env, uint32_t
type)
booke206_flush_tlb(env, flags, 1);
}
-#endif
diff --git a/target-ppc/user_only_helper.c b/target-ppc/user_only_helper.c
new file mode 100644
index 0000000..56e686e
--- /dev/null
+++ b/target-ppc/user_only_helper.c
@@ -0,0 +1,44 @@
+/*
+ * PowerPC MMU stub handling for user mode emulation
+ *
+ * Copyright (c) 2003-2007 Jocelyn Mayer
+ * Copyright (c) 2013 David Gibson, IBM Corporation.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+
+int cpu_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+ int mmu_idx)
+{
+ int exception, error_code;
+
+ if (rw == 2) {
+ exception = POWERPC_EXCP_ISI;
+ error_code = 0x40000000;
+ } else {
+ exception = POWERPC_EXCP_DSI;
+ error_code = 0x40000000;
+ if (rw) {
+ error_code |= 0x02000000;
+ }
+ env->spr[SPR_DAR] = address;
+ env->spr[SPR_DSISR] = error_code;
+ }
+ env->exception_index = exception;
+ env->error_code = error_code;
+
+ return 1;
+}
--
1.7.10.4
- [Qemu-ppc] [0/48] target-ppc: MMU implementation cleanup for hash MMUs, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 02/48] target-ppc: Trivial cleanups in mmu_helper.c, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 46/48] target-ppc: Split user only code out of mmu_helper.c,
David Gibson <=
- [Qemu-ppc] [PATCH 29/48] mmu-hash64: Clean up ppc_hash64_htab_lookup(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 25/48] mmu-hash*: Don't keep looking for PTEs after we find a match, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 23/48] mmu-hash32: Split direct store segment handling into a helper, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 18/48] mmu-hash*: Reduce use of access_type, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 28/48] mmu-hash*: Remove permission checking from find_pte{32, 64}(), David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 01/48] target-ppc: Remove vestigial PowerPC 620 support, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 37/48] mmu-hash32: Remove nx from context structure, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 22/48] mmu-hash32: Split out handling of direct store segments, David Gibson, 2013/03/12
- [Qemu-ppc] [PATCH 40/48] mmu-hash*: Clean up PTE flags update, David Gibson, 2013/03/12