Re: [Qemu-ppc] [PATCH] ppc: initialize GPRs as per epapr

[David Gibson]

On Fri, Apr 26, 2013 at 08:21:24AM +0200, Alexander Graf wrote:
> 
> On 26.04.2013, at 08:17, Bharat Bhushan wrote:
> 
> > ePAPR defines the initial values of cpu registers. This patch initialize
> > the GPRs as per ePAPR specification.
> > 
> > This resolves the issue of guest reboot/reset (guest hang on reboot).
> 
> Why does it hang only on reboot, not on initial bootup?
> 
> > 
> > Signed-off-by: Bharat Bhushan <address@hidden>
> > Signed-off-by: Stuart Yoder <address@hidden>
> > ---
> > hw/ppc/e500.c |    7 +++++++
> > 1 files changed, 7 insertions(+), 0 deletions(-)
> > 
> > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> > index c1bdb6b..a47f976 100644
> > --- a/hw/ppc/e500.c
> > +++ b/hw/ppc/e500.c
> > @@ -37,6 +37,7 @@
> > #include "qemu/host-utils.h"
> > #include "hw/pci-host/ppce500.h"
> > 
> > +#define EPAPR_MAGIC                (0x45504150)
> > #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
> > #define UIMAGE_LOAD_BASE           0
> > #define DTC_LOAD_PAD               0x1800000
> > @@ -444,6 +445,12 @@ static void ppce500_cpu_reset(void *opaque)
> 
> Does ePAPR mention anything wrt GPR state of secondary CPUs?

Yes and no.  The entry point state for secondary CPUs depends on the
"enable-method" used to start the CPU.  The spin-table enable method
defined in ePAPR gives some information on GPR state, although the
constraints are much weaker than for the boot cpu.  Platform specific
enable-methods would have to define their own entry point requirements.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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