[Qemu-ppc] [PULL 040/118] target-ppc: Introduce DFP Quantize

[Alexander Graf]

From: Tom Musta <address@hidden>

Add emulation of the PowerPC Decimal Floating Point Quantize instructions
dquai[q][.] and dqua[q][.].

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
 target-ppc/dfp_helper.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++++
 target-ppc/helper.h     |   4 ++
 target-ppc/translate.c  |   8 +++
 3 files changed, 144 insertions(+)

diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 574956a..e5574b5 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -79,6 +79,47 @@ static void dfp_prepare_rounding_mode(decContext *context, 
uint64_t fpscr)
     decContextSetRounding(context, rnd);
 }
 
+static void dfp_set_round_mode_from_immediate(uint8_t r, uint8_t rmc,
+                                                  struct PPC_DFP *dfp)
+{
+    enum rounding rnd;
+    if (r == 0) {
+        switch (rmc & 3) {
+        case 0:
+            rnd = DEC_ROUND_HALF_EVEN;
+            break;
+        case 1:
+            rnd = DEC_ROUND_DOWN;
+            break;
+        case 2:
+            rnd = DEC_ROUND_HALF_UP;
+            break;
+        case 3: /* use FPSCR rounding mode */
+            return;
+        default:
+            assert(0); /* cannot get here */
+        }
+    } else { /* r == 1 */
+        switch (rmc & 3) {
+        case 0:
+            rnd = DEC_ROUND_CEILING;
+            break;
+        case 1:
+            rnd = DEC_ROUND_FLOOR;
+            break;
+        case 2:
+            rnd = DEC_ROUND_UP;
+            break;
+        case 3:
+            rnd = DEC_ROUND_HALF_DOWN;
+            break;
+        default:
+            assert(0); /* cannot get here */
+        }
+    }
+    decContextSetRounding(&dfp->context, rnd);
+}
+
 static void dfp_prepare_decimal64(struct PPC_DFP *dfp, uint64_t *a,
                 uint64_t *b, CPUPPCState *env)
 {
@@ -301,6 +342,15 @@ static void dfp_check_for_VXVC(struct PPC_DFP *dfp)
     }
 }
 
+static void dfp_check_for_VXCVI(struct PPC_DFP *dfp)
+{
+    if ((dfp->context.status & DEC_Invalid_operation) &&
+        (!decNumberIsSNaN(&dfp->a)) &&
+        (!decNumberIsSNaN(&dfp->b))) {
+        dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXCVI, FP_VE);
+    }
+}
+
 static void dfp_set_CRBF_from_T(struct PPC_DFP *dfp)
 {
     if (decNumberIsNaN(&dfp->t)) {
@@ -320,6 +370,12 @@ static void dfp_set_FPCC_from_CRBF(struct PPC_DFP *dfp)
     dfp->env->fpscr |= (dfp->crbf << 12);
 }
 
+static inline void dfp_makeQNaN(decNumber *dn)
+{
+    dn->bits &= ~DECSPECIAL;
+    dn->bits |= DECNAN;
+}
+
 #define DFP_HELPER_TAB(op, dnop, postprocs, size)                              
\
 void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b)      
\
 {                                                                              
\
@@ -571,3 +627,79 @@ uint32_t helper_##op(CPUPPCState *env, uint64_t *a, 
uint64_t *b)         \
 
 DFP_HELPER_TSTSF(dtstsf, 64)
 DFP_HELPER_TSTSF(dtstsfq, 128)
+
+static void QUA_PPs(struct PPC_DFP *dfp)
+{
+    dfp_set_FPRF_from_FRT(dfp);
+    dfp_check_for_XX(dfp);
+    dfp_check_for_VXSNAN(dfp);
+    dfp_check_for_VXCVI(dfp);
+}
+
+static void dfp_quantize(uint8_t rmc, struct PPC_DFP *dfp)
+{
+    dfp_set_round_mode_from_immediate(0, rmc, dfp);
+    decNumberQuantize(&dfp->t, &dfp->b, &dfp->a, &dfp->context);
+    if (decNumberIsSNaN(&dfp->a)) {
+        dfp->t = dfp->a;
+        dfp_makeQNaN(&dfp->t);
+    } else if (decNumberIsSNaN(&dfp->b)) {
+        dfp->t = dfp->b;
+        dfp_makeQNaN(&dfp->t);
+    } else if (decNumberIsQNaN(&dfp->a)) {
+        dfp->t = dfp->a;
+    } else if (decNumberIsQNaN(&dfp->b)) {
+        dfp->t = dfp->b;
+    }
+}
+
+#define DFP_HELPER_QUAI(op, size)                                       \
+void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *b,            \
+                 uint32_t te, uint32_t rmc)                             \
+{                                                                       \
+    struct PPC_DFP dfp;                                                 \
+                                                                        \
+    dfp_prepare_decimal##size(&dfp, 0, b, env);                         \
+                                                                        \
+    decNumberFromUInt32(&dfp.a, 1);                                     \
+    dfp.a.exponent = (int32_t)((int8_t)(te << 3) >> 3);                 \
+                                                                        \
+    dfp_quantize(rmc, &dfp);                                            \
+    decimal##size##FromNumber((decimal##size *)dfp.t64, &dfp.t,         \
+                              &dfp.context);                            \
+    QUA_PPs(&dfp);                                                      \
+                                                                        \
+    if (size == 64) {                                                   \
+        t[0] = dfp.t64[0];                                              \
+    } else if (size == 128) {                                           \
+        t[0] = dfp.t64[HI_IDX];                                         \
+        t[1] = dfp.t64[LO_IDX];                                         \
+    }                                                                   \
+}
+
+DFP_HELPER_QUAI(dquai, 64)
+DFP_HELPER_QUAI(dquaiq, 128)
+
+#define DFP_HELPER_QUA(op, size)                                        \
+void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a,            \
+                 uint64_t *b, uint32_t rmc)                             \
+{                                                                       \
+    struct PPC_DFP dfp;                                                 \
+                                                                        \
+    dfp_prepare_decimal##size(&dfp, a, b, env);                         \
+                                                                        \
+    dfp_quantize(rmc, &dfp);                                            \
+    decimal##size##FromNumber((decimal##size *)dfp.t64, &dfp.t,         \
+                              &dfp.context);                            \
+    QUA_PPs(&dfp);                                                      \
+                                                                        \
+    if (size == 64) {                                                   \
+        t[0] = dfp.t64[0];                                              \
+    } else if (size == 128) {                                           \
+        t[0] = dfp.t64[HI_IDX];                                         \
+        t[1] = dfp.t64[LO_IDX];                                         \
+    }                                                                   \
+}
+
+DFP_HELPER_QUA(dqua, 64)
+DFP_HELPER_QUA(dquaq, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 2b39d2a..362e9a8 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -636,3 +636,7 @@ DEF_HELPER_3(dtstex, i32, env, fprp, fprp)
 DEF_HELPER_3(dtstexq, i32, env, fprp, fprp)
 DEF_HELPER_3(dtstsf, i32, env, fprp, fprp)
 DEF_HELPER_3(dtstsfq, i32, env, fprp, fprp)
+DEF_HELPER_5(dquai, void, env, fprp, fprp, i32, i32)
+DEF_HELPER_5(dquaiq, void, env, fprp, fprp, i32, i32)
+DEF_HELPER_5(dqua, void, env, fprp, fprp, fprp, i32)
+DEF_HELPER_5(dquaq, void, env, fprp, fprp, fprp, i32)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 441eea1..c2753a3 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8375,6 +8375,10 @@ GEN_DFP_BF_A_B(dtstex)
 GEN_DFP_BF_A_B(dtstexq)
 GEN_DFP_BF_A_B(dtstsf)
 GEN_DFP_BF_A_B(dtstsfq)
+GEN_DFP_T_B_U32_U32_Rc(dquai, SIMM5, RMC)
+GEN_DFP_T_B_U32_U32_Rc(dquaiq, SIMM5, RMC)
+GEN_DFP_T_A_B_I32_Rc(dqua, RMC)
+GEN_DFP_T_A_B_I32_Rc(dquaq, RMC)
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -11322,6 +11326,10 @@ GEN_DFP_BF_A_B(dtstex, 0x02, 0x05),
 GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05),
 GEN_DFP_BF_A_B(dtstsf, 0x02, 0x15),
 GEN_DFP_BF_A_Bp(dtstsfq, 0x02, 0x15),
+GEN_DFP_TE_T_B_RMC_Rc(dquai, 0x03, 0x02),
+GEN_DFP_TE_Tp_Bp_RMC_Rc(dquaiq, 0x03, 0x02),
+GEN_DFP_T_A_B_RMC_Rc(dqua, 0x03, 0x00),
+GEN_DFP_Tp_Ap_Bp_RMC_Rc(dquaq, 0x03, 0x00),
 #undef GEN_SPE
 #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
     GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, 
PPC_NONE)
-- 
1.8.1.4