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[Qemu-ppc] [PULL 10/37] target-ppc: Eliminate set_fprf Argument From gen
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From: |
Alexander Graf |
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Subject: |
[Qemu-ppc] [PULL 10/37] target-ppc: Eliminate set_fprf Argument From gen_compute_fprf |
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Date: |
Wed, 7 Jan 2015 16:20:21 +0100 |
From: Tom Musta <address@hidden>
The set_fprf argument to the gen_compute_fprf() utility is no longer
needed -- gen_compute_fprf() is now called only when FPRF is actually
computed and set. Eliminate the obsolete argument.
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 38 +++++++++++++++++++++++---------------
1 file changed, 23 insertions(+), 15 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 18cd8c4..598f02e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -250,16 +250,14 @@ static inline void gen_reset_fpstatus(void)
gen_helper_reset_fpstatus(cpu_env);
}
-static inline void gen_compute_fprf(TCGv_i64 arg, int set_fprf)
+static inline void gen_compute_fprf(TCGv_i64 arg)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- if (set_fprf != 0) {
- /* This case might be optimized later */
- tcg_gen_movi_i32(t0, 1);
- gen_helper_compute_fprf(t0, cpu_env, arg, t0);
- gen_helper_float_check_status(cpu_env);
- }
+ /* This case might be optimized later */
+ tcg_gen_movi_i32(t0, 1);
+ gen_helper_compute_fprf(t0, cpu_env, arg, t0);
+ gen_helper_float_check_status(cpu_env);
tcg_temp_free_i32(t0);
}
@@ -2102,7 +2100,9 @@ static void gen_f##name(DisasContext *ctx)
\
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (set_fprf) { \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
@@ -2129,7 +2129,9 @@ static void gen_f##name(DisasContext *ctx)
\
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (set_fprf) { \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
@@ -2155,7 +2157,9 @@ static void gen_f##name(DisasContext *ctx)
\
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rD(ctx->opcode)]); \
} \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (set_fprf) { \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
@@ -2176,7 +2180,9 @@ static void gen_f##name(DisasContext *ctx)
\
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (set_fprf) { \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
@@ -2194,7 +2200,9 @@ static void gen_f##name(DisasContext *ctx)
\
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], set_fprf); \
+ if (set_fprf) { \
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \
+ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \
} \
@@ -2230,7 +2238,7 @@ static void gen_frsqrtes(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
@@ -2254,7 +2262,7 @@ static void gen_fsqrt(DisasContext *ctx)
gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
@@ -2273,7 +2281,7 @@ static void gen_fsqrts(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]);
- gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1);
+ gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx);
}
--
1.8.1.4
- [Qemu-ppc] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number, (continued)
- [Qemu-ppc] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 08/37] target-ppc: mffs. Should Set CR1 from FPSCR Bits, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 37/37] hw/ppc/mac_newworld: simplify usb controller creation logic, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 35/37] hw/ppc/mac_newworld: QOMified mac99 machines, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 09/37] target-ppc: Fully Migrate to gen_set_cr1_from_fpscr, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 04/37] PPC: e500 pci host: Add support for ATMUs, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 12/37] target-ppc: explicitly save page table headers in big endian, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 27/37] target-ppc: Introduce tcheck, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 17/37] ppc: do not use get_clock_realtime(), Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 23/37] target-ppc: Power8 Supports Transactional Memory, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 10/37] target-ppc: Eliminate set_fprf Argument From gen_compute_fprf,
Alexander Graf <=
- [Qemu-ppc] [PULL 30/37] target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 01/37] PPC: e500: Move CCSR definition to params, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 33/37] hw/machine: added machine_usb wrapper, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 07/37] target-ppc: Fix Floating Point Move Instructions That Set CR1, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 16/37] device-tree: fix memory leak, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 11/37] target-ppc: Eliminate set_fprf Argument From helper_compute_fprf, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 25/37] target-ppc: Introduce tbegin, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 20/37] target-ppc: Introduce Instruction Type for Transactional Memory, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 21/37] target-ppc: Introduce Feature Flag for Transactional Memory, Alexander Graf, 2015/01/07
- [Qemu-ppc] [PULL 18/37] PPC: Fix crash on spapr_tce_table_finalize(), Alexander Graf, 2015/01/07