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Re: [Qemu-ppc] [PATCH v3] tcg/ppc: Improve unaligned load/store handling


From: Alexander Graf
Subject: Re: [Qemu-ppc] [PATCH v3] tcg/ppc: Improve unaligned load/store handling on 64-bit backend
Date: Tue, 21 Jul 2015 14:04:18 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0

On 07/21/15 11:46, Benjamin Herrenschmidt wrote:
On Tue, 2015-07-21 at 07:39 +0100, Richard Henderson wrote:
On 07/21/2015 07:33 AM, Benjamin Herrenschmidt wrote:
On Tue, 2015-07-21 at 07:27 +0100, Richard Henderson wrote:
On 07/21/2015 06:19 AM, Benjamin Herrenschmidt wrote:
+    /* Clear the non-page, non-alignment bits from the address */
        if (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32) {
+        /* We don't support unaligned accesses on 32-bits, preserve
+         * the bottom bits and thus trigger a comparison failure on
+         * unaligned accesses
+         */
            tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0,
                        (32 - s_bits) & 31, 31 - TARGET_PAGE_BITS);
Why don't you support this unaligned acess with 32-bit guests?
No reason, I just didn't get to do it yet. It's possible, I was just
lazy :-) It also adds one instruction. On 64-bit we always have 2
instructions anyway so it wasn't adding any overhead really, on 32-bit
we get away with a single rlwinm, while adding the unaligned support
would make it an addi + rlwinm.
Ah, ok.  I wondered if some older 32-bit host ppc didn't allow it, and the
32-bit guest paid the price.  Anyway,
No, most implementations support unaligned accesses in common cases. I
think the worst embedded variants might trap when crossing page
boundaries but that's about it. I don't think we bother emulating
this though.

Reviewed-by: Richard Henderson <address@hidden>
Thanks.

So who can pick those up? PPC TCG is pretty much unmaintained since Malc disappeared, no?


Alex




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