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Re: [Qemu-ppc] [PATCH v1 1/3] target-ppc: implement vexts[bh]2w and vext


From: David Gibson
Subject: Re: [Qemu-ppc] [PATCH v1 1/3] target-ppc: implement vexts[bh]2w and vexts[bhw]2d
Date: Thu, 13 Oct 2016 11:23:01 +1100
User-agent: Mutt/1.7.0 (2016-08-17)

On Wed, Oct 12, 2016 at 10:38:51AM +0530, Nikunj A Dadhania wrote:
> Vector Extend Sign Instructions:
> 
> vextsb2w: Vector Extend Sign Byte To Word
> vextsh2w: Vector Extend Sign Halfword To Word
> vextsb2d: Vector Extend Sign Byte To Doubleword
> vextsh2d: Vector Extend Sign Halfword To Doubleword
> vextsw2d: Vector Extend Sign Word To Doubleword
> 
> Signed-off-by: Nikunj A Dadhania <address@hidden>

Applied to ppc-for-2.8, thanks.

> ---
>  target-ppc/helper.h                 |  5 +++++
>  target-ppc/int_helper.c             | 15 +++++++++++++++
>  target-ppc/translate/vmx-impl.inc.c |  5 +++++
>  target-ppc/translate/vmx-ops.inc.c  |  5 +++++
>  4 files changed, 30 insertions(+)
> 
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 796ad45..04c6421 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -267,6 +267,11 @@ DEF_HELPER_3(vinsertb, void, avr, avr, i32)
>  DEF_HELPER_3(vinserth, void, avr, avr, i32)
>  DEF_HELPER_3(vinsertw, void, avr, avr, i32)
>  DEF_HELPER_3(vinsertd, void, avr, avr, i32)
> +DEF_HELPER_2(vextsb2w, void, avr, avr)
> +DEF_HELPER_2(vextsh2w, void, avr, avr)
> +DEF_HELPER_2(vextsb2d, void, avr, avr)
> +DEF_HELPER_2(vextsh2d, void, avr, avr)
> +DEF_HELPER_2(vextsw2d, void, avr, avr)
>  DEF_HELPER_2(vupkhpx, void, avr, avr)
>  DEF_HELPER_2(vupklpx, void, avr, avr)
>  DEF_HELPER_2(vupkhsb, void, avr, avr)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index 202854f..5aee0a8 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -1934,6 +1934,21 @@ VEXTRACT(uw, u32)
>  VEXTRACT(d, u64)
>  #undef VEXTRACT
>  
> +#define VEXT_SIGNED(name, element, mask, cast, recast)              \
> +void helper_##name(ppc_avr_t *r, ppc_avr_t *b)                      \
> +{                                                                   \
> +    int i;                                                          \
> +    VECTOR_FOR_INORDER_I(i, element) {                              \
> +        r->element[i] = (recast)((cast)(b->element[i] & mask));     \
> +    }                                                               \
> +}
> +VEXT_SIGNED(vextsb2w, s32, UINT8_MAX, int8_t, int32_t)
> +VEXT_SIGNED(vextsb2d, s64, UINT8_MAX, int8_t, int64_t)
> +VEXT_SIGNED(vextsh2w, s32, UINT16_MAX, int16_t, int32_t)
> +VEXT_SIGNED(vextsh2d, s64, UINT16_MAX, int16_t, int64_t)
> +VEXT_SIGNED(vextsw2d, s64, UINT32_MAX, int32_t, int64_t)
> +#undef VEXT_SIGNED
> +
>  #define VSPLTI(suffix, element, splat_type)                     \
>      void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat)   \
>      {                                                           \
> diff --git a/target-ppc/translate/vmx-impl.inc.c 
> b/target-ppc/translate/vmx-impl.inc.c
> index 25cd073..c8998f3 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -815,6 +815,11 @@ GEN_VXFORM_NOA(vclzb, 1, 28)
>  GEN_VXFORM_NOA(vclzh, 1, 29)
>  GEN_VXFORM_NOA(vclzw, 1, 30)
>  GEN_VXFORM_NOA(vclzd, 1, 31)
> +GEN_VXFORM_NOA_2(vextsb2w, 1, 24, 16)
> +GEN_VXFORM_NOA_2(vextsh2w, 1, 24, 17)
> +GEN_VXFORM_NOA_2(vextsb2d, 1, 24, 24)
> +GEN_VXFORM_NOA_2(vextsh2d, 1, 24, 25)
> +GEN_VXFORM_NOA_2(vextsw2d, 1, 24, 26)
>  GEN_VXFORM_NOA_2(vctzb, 1, 24, 28)
>  GEN_VXFORM_NOA_2(vctzh, 1, 24, 29)
>  GEN_VXFORM_NOA_2(vctzw, 1, 24, 30)
> diff --git a/target-ppc/translate/vmx-ops.inc.c 
> b/target-ppc/translate/vmx-ops.inc.c
> index ac1dc9b..68cba3e 100644
> --- a/target-ppc/translate/vmx-ops.inc.c
> +++ b/target-ppc/translate/vmx-ops.inc.c
> @@ -215,6 +215,11 @@ GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 
> 0x00000000, 0x100000,
>  GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000,
>                                                 PPC_ALTIVEC),
>  GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000),
> +GEN_VXFORM_300_EO(vextsb2w, 0x01, 0x18, 0x10),
> +GEN_VXFORM_300_EO(vextsh2w, 0x01, 0x18, 0x11),
> +GEN_VXFORM_300_EO(vextsb2d, 0x01, 0x18, 0x18),
> +GEN_VXFORM_300_EO(vextsh2d, 0x01, 0x18, 0x19),
> +GEN_VXFORM_300_EO(vextsw2d, 0x01, 0x18, 0x1A),
>  GEN_VXFORM_300_EO(vctzb, 0x01, 0x18, 0x1C),
>  GEN_VXFORM_300_EO(vctzh, 0x01, 0x18, 0x1D),
>  GEN_VXFORM_300_EO(vctzw, 0x01, 0x18, 0x1E),

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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