[Qemu-ppc] [PATCH v1 08/14] target-ppc: Use correct precision for FPRF setting

[Nikunj A Dadhania]

From: Bharata B Rao <address@hidden>

Use correct FP precision when setting FPRF in FP conversion helpers
instead of always assuming float64 precision.

Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
---
 target/ppc/fpu_helper.c | 4 ++--
 target/ppc/internal.h   | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index aacfd12..05b2926 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -109,6 +109,7 @@ void helper_compute_fprf_##tp(CPUPPCState *env, tp arg)     
   \
 }
 
 COMPUTE_FPRF(float16)
+COMPUTE_FPRF(float32)
 COMPUTE_FPRF(float64)
 COMPUTE_FPRF(float128)
 
@@ -2688,8 +2689,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)       
         \
             xt.tfld = ttp##_snan_to_qnan(xt.tfld);                 \
         }                                                          \
         if (sfprf) {                                               \
-            helper_compute_fprf_float64(env, ttp##_to_float64(xt.tfld, \
-                                &env->fp_status));                 \
+            helper_compute_fprf_##ttp(env, xt.tfld);               \
         }                                                          \
     }                                                              \
                                                                    \
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 16fc117..8dcc679 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -246,4 +246,5 @@ static inline void putVSR(int n, ppc_vsr_t *vsr, 
CPUPPCState *env)
 
 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
+void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
 #endif /* PPC_INTERNAL_H */
-- 
2.7.4