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Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 1/5] target/ppc: Add ibm, p
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 1/5] target/ppc: Add ibm, processor-radix-AP-encodings for TCG |
Date: |
Thu, 30 Mar 2017 16:02:08 +1100 |
User-agent: |
Mutt/1.8.0 (2017-02-23) |
On Wed, Mar 29, 2017 at 04:43:45PM +1100, Suraj Jitindar Singh wrote:
> The ibm,processor-radix-AP-encodings device tree property of the cpu node
> is used to specify the radix mode supported page sizes of the processor
> to the guest os. Contained in the top 3 bits of the msb is the actual
> page size (AP) encoding associated with the corresponding radix mode
> supported page size. Add this property for a TCG guest, note the TCG code
> is capable of translating any format so just add the 4 default page sizes.
>
> The ibm,processor-radix-AP-encodings device tree property is defined as:
> One to n cells in ascending order of radix mode supported page sizes
> encoded as BE ints (32bit on ppc) in the form:
> 0bxxxyyyyyyyyyyyyyyyyyyyyyyyyyyyyy
> - 0bxxx -> AP encoding
> - 0byyyyyyyyyyyyyyyyyyyyyyyyyyyyy -> supported page size encoded as a shift
>
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
Applied to ppc-for-2.10
>
> ---
> V2 -> V3:
> - Set to a default value irrespective and KVM-HV can overwrite this later
> if need be
> V1 -> V2:
> - Rework to use the interfaces introduced by the KVM code path
> ---
> target/ppc/translate_init.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index c1a9014..aa0c44d 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -8808,6 +8808,25 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
> pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr;
> }
>
> +#ifdef CONFIG_SOFTMMU
> +/*
> + * Radix pg sizes and AP encodings for dt node
> ibm,processor-radix-AP-encodings
> + * Encoded as array of int_32s in the form:
> + * 0bxxxyyyyyyyyyyyyyyyyyyyyyyyyyyyyy
> + * x -> AP encoding
> + * y -> radix mode supported page size (encoded as a shift)
> + */
> +static struct ppc_radix_page_info POWER9_radix_page_info = {
> + .count = 4,
> + .entries = {
> + 0x0000000c, /* 4K - enc: 0x0 */
> + 0xa0000010, /* 64K - enc: 0x5 */
> + 0x20000015, /* 2M - enc: 0x1 */
> + 0x4000001e /* 1G - enc: 0x2 */
> + }
> +};
> +#endif /* CONFIG_SOFTMMU */
> +
> static void init_proc_POWER9(CPUPPCState *env)
> {
> /* Common Registers */
> @@ -8959,6 +8978,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
> pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault;
> /* segment page size remain the same */
> pcc->sps = &POWER7_POWER8_sps;
> + pcc->radix_page_info = &POWER9_radix_page_info;
> #endif
> pcc->excp_model = POWERPC_EXCP_POWER8;
> pcc->bus_model = PPC_FLAGS_INPUT_POWER7;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 1/5] target/ppc: Add ibm, processor-radix-AP-encodings for TCG, Suraj Jitindar Singh, 2017/03/29
- [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 2/5] target/ppc: Flush TLB on write to PIDR, Suraj Jitindar Singh, 2017/03/29
- [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 3/5] target/ppc: Adapt tlbie[l] for ISAv3.00 Support, Suraj Jitindar Singh, 2017/03/29
- [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 5/5] target/ppc: Enable RADIX mmu mode for pseries TCG guest, Suraj Jitindar Singh, 2017/03/29
- [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 4/5] target/ppc: Implement ISA V3.00 radix page fault handler, Suraj Jitindar Singh, 2017/03/29
- Re: [Qemu-ppc] [Qemu-ppc for-2.10] [PATCH V3 1/5] target/ppc: Add ibm, processor-radix-AP-encodings for TCG,
David Gibson <=