Re: [Qemu-ppc] [PATCH RFC v1 1/3] target/ppc: Emulate LL/SC using cmpxchg helpers

[Nikunj A Dadhania]

Richard Henderson <address@hidden> writes:

> On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote:
>>      tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);
>>      l1 = gen_new_label();
>>      tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1);
>> -    tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ);
>> -    tcg_gen_qemu_st_tl(cpu_gpr[reg], EA, ctx->mem_idx, memop);
>> +
>> +    t0 = tcg_temp_new();
>> +    tcg_gen_atomic_cmpxchg_tl(t0, EA, cpu_reserve_val, cpu_gpr[reg],
>> +                              ctx->mem_idx, DEF_MEMOP(memop));
>
> Actually, I noticed another, existing, problem.
>
> This code changes CRF[0] before the user memory write, which might fault.  
> This 
> needs to delay any changes to the architecture visible state until after any 
> exception may be triggered.

Sure, here you are mentioning cpu_so being moved to CRF.

Regards
Nikunj