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[Qemu-ppc] [PULL 02/48] pseries: Add pseries-2.10 machine type
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 02/48] pseries: Add pseries-2.10 machine type |
Date: |
Wed, 26 Apr 2017 16:59:48 +1000 |
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 35db949..de5db75 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3158,18 +3158,37 @@ static const TypeInfo spapr_machine_info = {
type_init(spapr_machine_register_##suffix)
/*
+ * pseries-2.10
+ */
+static void spapr_machine_2_10_instance_options(MachineState *machine)
+{
+}
+
+static void spapr_machine_2_10_class_options(MachineClass *mc)
+{
+ /* Defaults for the latest behaviour inherited from the base class */
+}
+
+DEFINE_SPAPR_MACHINE(2_10, "2.10", true);
+
+/*
* pseries-2.9
*/
+#define SPAPR_COMPAT_2_9 \
+ HW_COMPAT_2_9
+
static void spapr_machine_2_9_instance_options(MachineState *machine)
{
+ spapr_machine_2_10_instance_options(machine);
}
static void spapr_machine_2_9_class_options(MachineClass *mc)
{
- /* Defaults for the latest behaviour inherited from the base class */
+ spapr_machine_2_10_class_options(mc);
+ SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9);
}
-DEFINE_SPAPR_MACHINE(2_9, "2.9", true);
+DEFINE_SPAPR_MACHINE(2_9, "2.9", false);
/*
* pseries-2.8
--
2.9.3
- [Qemu-ppc] [PULL 00/48] ppc-for-2.10 queue 20170426, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availability on P8s, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 04/48] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 03/48] ppc/spapr: QOM'ify sPAPRRTCState, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 10/48] spapr: move spapr_populate_pa_features(), David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 02/48] pseries: Add pseries-2.10 machine type,
David Gibson <=
- [Qemu-ppc] [PULL 08/48] target/ppc: Add new H-CALL shells for in memory table translation, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 11/48] spapr: Enable ISA 3.0 MMU mode selection via CAS, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 20/48] ppc/xics: add a realize() handler to ICPStateClass, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 21/48] ppc/pnv: add a PnvICPState object, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 24/48] ppc/pnv: create the ICP object under PnvCore, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 12/48] spapr: Workaround for broken radix guests, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 17/48] ppc/xics: introduce an 'intc' backlink under PowerPCCPU, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 37/48] ppc/pnv: enable only one LPC bus, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 38/48] ppc/pnv: scan ISA bus to populate device tree, David Gibson, 2017/04/26