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[Qemu-ppc] [PULL 22/48] ppc/pnv: extend the machine with a XICSFabric in
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 22/48] ppc/pnv: extend the machine with a XICSFabric interface |
Date: |
Wed, 26 Apr 2017 17:00:08 +1000 |
From: Cédric Le Goater <address@hidden>
A XICSFabric QOM interface is used by the XICS layer to manipulate the
ICP and ICS objects. Let's define the associated handlers for the
PowerNV machine. All handlers should be defined even if there is no
ICS under the PowerNV machine yet.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index aad7917..0a0cfe3 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -34,6 +34,7 @@
#include "qemu/cutils.h"
#include "qapi/visitor.h"
+#include "hw/ppc/xics.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/isa/isa.h"
@@ -738,6 +739,29 @@ static const TypeInfo pnv_chip_info = {
.abstract = true,
};
+static PowerPCCPU *ppc_get_vcpu_by_pir(int pir)
+{
+ CPUState *cs;
+
+ CPU_FOREACH(cs) {
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ CPUPPCState *env = &cpu->env;
+
+ if (env->spr_cb[SPR_PIR].default_value == pir) {
+ return cpu;
+ }
+ }
+
+ return NULL;
+}
+
+static ICPState *pnv_icp_get(XICSFabric *xi, int pir)
+{
+ PowerPCCPU *cpu = ppc_get_vcpu_by_pir(pir);
+
+ return cpu ? ICP(cpu->intc) : NULL;
+}
+
static void pnv_get_num_chips(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
@@ -788,6 +812,7 @@ static void powernv_machine_class_props_init(ObjectClass
*oc)
static void powernv_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
+ XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
mc->desc = "IBM PowerNV (Non-Virtualized)";
mc->init = ppc_powernv_init;
@@ -798,6 +823,7 @@ static void powernv_machine_class_init(ObjectClass *oc,
void *data)
mc->no_parallel = 1;
mc->default_boot_order = NULL;
mc->default_ram_size = 1 * G_BYTE;
+ xic->icp_get = pnv_icp_get;
powernv_machine_class_props_init(oc);
}
@@ -808,6 +834,10 @@ static const TypeInfo powernv_machine_info = {
.instance_size = sizeof(PnvMachineState),
.instance_init = powernv_machine_initfn,
.class_init = powernv_machine_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_XICS_FABRIC },
+ { },
+ },
};
static void powernv_machine_register_types(void)
--
2.9.3
- [Qemu-ppc] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree, (continued)
- [Qemu-ppc] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 12/48] spapr: Workaround for broken radix guests, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 17/48] ppc/xics: introduce an 'intc' backlink under PowerPCCPU, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 37/48] ppc/pnv: enable only one LPC bus, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 38/48] ppc/pnv: scan ISA bus to populate device tree, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 23/48] ppc/pnv: extend the machine with a InterruptStatsProvider interface, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 40/48] ppc/pnv: populate device tree for serial devices, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 28/48] ppc/pnv: Add OCC model stub with interrupt support, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 45/48] target/ppc: Flush TLB on write to PIDR, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 07/48] target-ppc: support KVM_CAP_PPC_MMU_RADIX, KVM_CAP_PPC_MMU_HASH_V3, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 22/48] ppc/pnv: extend the machine with a XICSFabric interface,
David Gibson <=
- [Qemu-ppc] [PULL 25/48] ppc/pnv: add a helper to calculate MMIO addresses registers, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 19/48] spapr: allocate the ICPState object from under sPAPRCPUCore, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 14/48] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 16/48] target/ppc: Add ibm, processor-radix-AP-encodings for TCG, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 09/48] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 29/48] ppc: add IPMI support, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 15/48] spapr_pci: Removed unused include, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 13/48] target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 31/48] ipmi: provide support for FRUs, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 41/48] ppc/pnv: populate device tree for IPMI BT devices, David Gibson, 2017/04/26