qemu-ppc
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-ppc] [PATCH RFC] spapr: ignore interrupts during reset state


From: David Gibson
Subject: Re: [Qemu-ppc] [PATCH RFC] spapr: ignore interrupts during reset state
Date: Fri, 9 Jun 2017 20:27:14 +1000
User-agent: Mutt/1.8.0 (2017-02-23)

On Fri, Jun 09, 2017 at 10:32:25AM +0530, Nikunj A Dadhania wrote:
> David Gibson <address@hidden> writes:
> 
> > On Thu, Jun 08, 2017 at 12:06:08PM +0530, Nikunj A Dadhania wrote:
> >> Rebooting a SMP TCG guest is broken for both single/multi threaded TCG.
> >
> > Ouch.  When exactly did this happen?
> 
> Broken since long
> 
> > I know that smp boot used to work under TCG, albeit very slowly.
> 
> SMP boot works, its the reboot issued from the guest doesn't boot and
> crashes in SLOF.

Oh, sorry, I misunderstood.

> 
> >> When reset happens, all the CPUs are in halted state. First CPU is brought 
> >> out
> >> of reset and secondary CPUs would be initialized by the guest kernel using 
> >> a
> >> rtas call start-cpu.
> >> 
> >> However, in case of TCG, decrementer interrupts keep on coming and waking 
> >> the
> >> secondary CPUs up.
> >
> > Ok.. how is that happening given that the secondary CPUs should have
> > MSR[EE] == 0?
> 
> Basically, the CPU is in halted condition and has_work() does not check
> for MSR_EE in that case. But I am not sure if checking MSR_EE is
> sufficient, as the CPU does go to halted state (idle) while running as
> well.

Ok, but we definitely should be able to fix this without new
variables.  If we can quiesce the secondary CPUs for the first boot,
we should be able to duplicate that for subsequent boots.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

Attachment: signature.asc
Description: PGP signature


reply via email to

[Prev in Thread] Current Thread [Next in Thread]