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Re: [Qemu-ppc] [PATCH v3] spapr: fix LSI interrupt specifiers in the dev
Re: [Qemu-ppc] [PATCH v3] spapr: fix LSI interrupt specifiers in the device tree
Wed, 6 Dec 2017 19:44:54 +1100
On Wed, Dec 06, 2017 at 09:13:16AM +0100, Greg Kurz wrote:
> LoPAPR 1.1 B.18.104.22.168 describes the "#interrupt-cells" property of the
> PowerPC External Interrupt Source Controller node as follows:
> Standard property name to define the number of cells in an interrupt-
> specifier within an interrupt domain.
> prop-encoded-array: An integer, encoded as with encode-int, that denotes
> the number of cells required to represent an interrupt specifier in its
> child nodes.
> The value of this property for the PowerPC External Interrupt option shall
> be 2. Thus all interrupt specifiers (as used in the standard “interrupts”
> property) shall consist of two cells, each containing an integer encoded
> as with encode-int. The first integer represents the interrupt number the
> second integer is the trigger code: 0 for edge triggered, 1 for level
> This patch fixes the interrupt specifiers in the "interrupt-map" property
> of the PHB node, that were setting the second cell to 8 (confusion with
> IRQ_TYPE_LEVEL_LOW ?) instead of 1.
> VIO devices and RTAS event sources use the same format for interrupt
> specifiers: while here, we introduce a common helper to handle the
> encoding details.
> Signed-off-by: Greg Kurz <address@hidden>
> Reviewed-by: Cédric Le Goater <address@hidden>
> Tested-by: Cédric Le Goater <address@hidden>
Applied to ppc-for-2.12. This has been wrong forever, so I don't
think we need to rush it into 2.11.
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
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