Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 00/35] ppc: support for the XIVE interrupt controller (POWER9)

[no-reply]

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v3 00/35] ppc: support for the XIVE interrupt 
controller (POWER9)

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
c4469e7316 ppc/pnv: add a PSI bridge model for POWER9 processor
33f2dbc799 ppc/pnv: add XIVE support
403005364d ppc: externalize ppc_get_vcpu_by_pir()
aaccb0b820 ppc/pnv: introduce a pnv_icp_create() helper
238430eaf9 spapr/xive: raise migration priority of the machine
58147d3114 spapr/xive, xics: reset KVM at machine reset
c10eec0b36 spapr/xive, xics: use the CPU_INTC handlers to reset KVM
ac85306946 intc: introduce a CPUIntc interface
5db0587d7a migration: discard non-migratable RAMBlocks
58b1c5a84d spapr/xive: add a XIVE KVM device to the machine
d04e47a5ce spapr/xive: add KVM support
0dfc28a269 spapr/xive: add common realize routine for KVM
2ecb56c69d target/ppc/kvm: add Linux KVM definitions for XIVE
87b9d2e8b2 spapr: add classes for the XIVE models
e83377df2b spapr: advertise XIVE exploitation mode in CAS
48987801b2 spapr: add support to dump XIVE information
829e2cbf09 spapr: toggle the ICP depending on the selected interrupt mode
3e35956bbf spapr: introduce a spapr_icp_create() helper
519c790144 spapr: add XIVE support to spapr_qirq()
f4f30c31c4 spapr: introduce a helper to map the XIVE memory regions
70574a057b sysbus: add a sysbus_mmio_unmap() helper
54465abc2d spapr: add device tree support for the XIVE exploitation mode
879817b623 spapr: add hcalls support for the XIVE exploitation interrupt mode
4afdd938d5 spapr: add a sPAPRXive object to the machine
f67a9f05b9 spapr: introduce a 'xive_exploitation' option to enable XIVE
11464bf255 spapr: add support for the SET_OS_PENDING command (XIVE)
a619ca5b74 spapr: notify the CPU when the XIVE interrupt priority is more 
privileged
5fc2664cfe spapr: push the XIVE EQ data in OS event queue
f62e7dbede spapr/xive: introduce the XIVE Event Queues
329205b1dc spapr/xive: introduce a XIVE interrupt presenter model
876c681a62 spapr/xive: add a single source block to the sPAPR XIVE model
5feac5da74 spapr/xive: introduce a XIVE interrupt controller for sPAPR
4d6b2f074b ppc/xive: introduce the XiveFabric interface
59d738daa4 ppc/xive: add support for the LSI interrupt sources
084d850ee3 ppc/xive: introduce a XIVE interrupt source model

=== OUTPUT BEGIN ===
Checking PATCH 1/35: ppc/xive: introduce a XIVE interrupt source model...
Checking PATCH 2/35: ppc/xive: add support for the LSI interrupt sources...
Checking PATCH 3/35: ppc/xive: introduce the XiveFabric interface...
Checking PATCH 4/35: spapr/xive: introduce a XIVE interrupt controller for 
sPAPR...
Checking PATCH 5/35: spapr/xive: add a single source block to the sPAPR XIVE 
model...
Checking PATCH 6/35: spapr/xive: introduce a XIVE interrupt presenter model...
Checking PATCH 7/35: spapr/xive: introduce the XIVE Event Queues...
Checking PATCH 8/35: spapr: push the XIVE EQ data in OS event queue...
Checking PATCH 9/35: spapr: notify the CPU when the XIVE interrupt priority is 
more privileged...
Checking PATCH 10/35: spapr: add support for the SET_OS_PENDING command 
(XIVE)...
Checking PATCH 11/35: spapr: introduce a 'xive_exploitation' option to enable 
XIVE...
Checking PATCH 12/35: spapr: add a sPAPRXive object to the machine...
Checking PATCH 13/35: spapr: add hcalls support for the XIVE exploitation 
interrupt mode...
Checking PATCH 14/35: spapr: add device tree support for the XIVE exploitation 
mode...
Checking PATCH 15/35: sysbus: add a sysbus_mmio_unmap() helper...
Checking PATCH 16/35: spapr: introduce a helper to map the XIVE memory 
regions...
Checking PATCH 17/35: spapr: add XIVE support to spapr_qirq()...
Checking PATCH 18/35: spapr: introduce a spapr_icp_create() helper...
Checking PATCH 19/35: spapr: toggle the ICP depending on the selected interrupt 
mode...
Checking PATCH 20/35: spapr: add support to dump XIVE information...
Checking PATCH 21/35: spapr: advertise XIVE exploitation mode in CAS...
Checking PATCH 22/35: spapr: add classes for the XIVE models...
Checking PATCH 23/35: target/ppc/kvm: add Linux KVM definitions for XIVE...
Checking PATCH 24/35: spapr/xive: add common realize routine for KVM...
Checking PATCH 25/35: spapr/xive: add KVM support...
Checking PATCH 26/35: spapr/xive: add a XIVE KVM device to the machine...
Checking PATCH 27/35: migration: discard non-migratable RAMBlocks...
ERROR: Macros with multiple statements should be enclosed in a do - while loop
#96: FILE: migration/ram.c:191:
+#define RAMBLOCK_FOREACH_MIGRATABLE(block)             \
+    RAMBLOCK_FOREACH(block)                            \
+        if (!qemu_ram_is_migratable(block)) {} else

ERROR: trailing statements should be on next line
#98: FILE: migration/ram.c:193:
+        if (!qemu_ram_is_migratable(block)) {} else

total: 2 errors, 0 warnings, 167 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 28/35: intc: introduce a CPUIntc interface...
Checking PATCH 29/35: spapr/xive, xics: use the CPU_INTC handlers to reset 
KVM...
Checking PATCH 30/35: spapr/xive, xics: reset KVM at machine reset...
Checking PATCH 31/35: spapr/xive: raise migration priority of the machine...
Checking PATCH 32/35: ppc/pnv: introduce a pnv_icp_create() helper...
Checking PATCH 33/35: ppc: externalize ppc_get_vcpu_by_pir()...
Checking PATCH 34/35: ppc/pnv: add XIVE support...
Checking PATCH 35/35: ppc/pnv: add a PSI bridge model for POWER9 processor...
=== OUTPUT END ===

Test command exited with code: 1


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