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Re: [Qemu-riscv] [Qemu-devel] [PATCH v3 1/1] riscv: Ensure the kernel st


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH v3 1/1] riscv: Ensure the kernel start address is correctly cast
Date: Thu, 24 Jan 2019 22:57:19 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0

On 1/24/19 6:37 PM, Alistair Francis wrote:
> Cast the kernel start address to the target bit length.
> 
> This ensures that we calculate the initrd offset to a valid address for
> the architecture.
> 
> Steps to reproduce the original problem (reported by Alex):
>   Build U-Boot for the virt machine for riscv32. Then run it with
> 
>     $ qemu-system-riscv32 -M virt -kernel u-boot -nographic -initrd <a file>
> 
>   You can find the initrd address with
> 
>     U-Boot# fdt addr $fdtcontroladdr
>     U-Boot# fdt ls /chosen
> 
>   Then take a peek at that address:
> 
>     U-Boot# md.b <addr>
> 
>   and you will see that there is nothing there without this patch. The
>   reason is that the binary was loaded to a negative address.
> 
> Signed-off-by: Alistair Francis <address@hidden>
> Suggested-by: Alexander Graf <address@hidden>
> Reported-by: Alexander Graf <address@hidden>
> ---
> v3:
>  - Add steps to reproduce

Thanks, this is useful to write an acceptance test.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> v2:
>  - Remove old comment
>  hw/riscv/sifive_e.c | 2 +-
>  hw/riscv/sifive_u.c | 2 +-
>  hw/riscv/spike.c    | 2 +-
>  hw/riscv/virt.c     | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 5d9d65ff29..e5d7fc548e 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -74,7 +74,7 @@ static const struct MemmapEntry {
>      [SIFIVE_E_DTIM] =     { 0x80000000,     0x4000 }
>  };
>  
> -static uint64_t load_kernel(const char *kernel_filename)
> +static target_ulong load_kernel(const char *kernel_filename)
>  {
>      uint64_t kernel_entry, kernel_high;
>  
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 3bd3b67507..3b3acec377 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -65,7 +65,7 @@ static const struct MemmapEntry {
>  
>  #define GEM_REVISION        0x10070109
>  
> -static uint64_t load_kernel(const char *kernel_filename)
> +static target_ulong load_kernel(const char *kernel_filename)
>  {
>      uint64_t kernel_entry, kernel_high;
>  
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 268df04c3c..79cb4c1282 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -53,7 +53,7 @@ static const struct MemmapEntry {
>      [SPIKE_DRAM] =     { 0x80000000,        0x0 },
>  };
>  
> -static uint64_t load_kernel(const char *kernel_filename)
> +static target_ulong load_kernel(const char *kernel_filename)
>  {
>      uint64_t kernel_entry, kernel_high;
>  
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index e7f0716fb6..648462b18c 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -62,7 +62,7 @@ static const struct MemmapEntry {
>      [VIRT_PCIE_ECAM] =   { 0x30000000,    0x10000000 },
>  };
>  
> -static uint64_t load_kernel(const char *kernel_filename)
> +static target_ulong load_kernel(const char *kernel_filename)
>  {
>      uint64_t kernel_entry, kernel_high;
>  
> 



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