Re: [Qemu-riscv] [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
a3cbe72 target/riscv: Remaining rvc insn reuse 32 bit translators
9afdd3e target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
b915423 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
4e79caa target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
0121b65 target/riscv: Convert @cs_2 insns to share translation functions
b7a4ef9 target/riscv: Remove decode_RV32_64G()
510bbe8 target/riscv: Remove gen_system()
f1331f5 target/riscv: Rename trans_arith to gen_arith
b276b8c target/riscv: Remove manual decoding of RV32/64M insn
d445e37 target/riscv: Remove shift and slt insn manual decoding
46bfc39 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
9db1077 target/riscv: Move gen_arith_imm() decoding into trans_* functions
72b35f4 target/riscv: Remove manual decoding from gen_store()
84c26d7 target/riscv: Remove manual decoding from gen_load()
4779d13 target/riscv: Remove manual decoding from gen_branch()
5870468 target/riscv: Remove gen_jalr()
fb02c0c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
64793c9 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
5e210d0 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
8d3d945 target/riscv: Convert RV priv insns to decodetree
d3a238f target/riscv: Convert RV64D insns to decodetree
982f175 target/riscv: Convert RV32D insns to decodetree
3fe1356 target/riscv: Convert RV64F insns to decodetree
d231c90 target/riscv: Convert RV32F insns to decodetree
82b118b target/riscv: Convert RV64A insns to decodetree
32b39a2 target/riscv: Convert RV32A insns to decodetree
d6f6f2b target/riscv: Convert RVXM insns to decodetree
34094a1 target/riscv: Convert RVXI csr insns to decodetree
6995f94 target/riscv: Convert RVXI fence insns to decodetree
0a445ed target/riscv: Convert RVXI arithmetic insns to decodetree
3566ff3 target/riscv: Convert RV64I load/store insns to decodetree
9f47cca target/riscv: Convert RV32I load/store insns to decodetree
b28fd8e target/riscv: Convert RVXI branch insns to decodetree
dde69a0 target/riscv: Activate decodetree and implemnt LUI & AUIPC
3e3b3d7 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 3e3b3d7bd110 (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit dde69a04bec7 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1687:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit b28fd8eb6190 (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit 9f47cca20003 (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit 3566ff341f1c (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 0a445ed42134 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit 6995f940028d (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit 34094a1d0d03 (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit d6f6f2bb7f86 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 32b39a20f7d1 (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 82b118b87c5f (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit d231c90bc0fb (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 397 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 3fe1356adf7d (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 982f17583919 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 353 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit d3a238f2f0a7 (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit 8d3d945cdcc3 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 5e210d0cb62b (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:983:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 64793c940e59 (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit fb02c0c0753e (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 58704684980a (target/riscv: Remove gen_jalr())
21/35 Checking commit 4779d1354543 (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit 84c26d735452 (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit 72b35f4f5e56 (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit 9db10777af3b (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit 46bfc390d4dd (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit d445e37b121e (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit b276b8c471be (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit f1331f538b13 (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 510bbe84104f (target/riscv: Remove gen_system())
30/35 Checking commit b7a4ef9b8a01 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 0121b6527d37 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:497:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 4e79caa2c455 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit b915423a7d63 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 287 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 9afdd3ec498e (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit a3cbe726d4e4 (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden