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Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to
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Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree |
Date: |
Fri, 15 Feb 2019 07:45:21 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
cc8505ed4b target/riscv: Remaining rvc insn reuse 32 bit translators
20585ad92f target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
65479e48d3 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
0f0ad0478b target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
35b75fe79c target/riscv: Convert @cs_2 insns to share translation functions
868cd4fedd target/riscv: Remove decode_RV32_64G()
10e50a6df3 target/riscv: Remove gen_system()
6cb56750e2 target/riscv: Rename trans_arith to gen_arith
88ae76827f target/riscv: Remove manual decoding of RV32/64M insn
1e89edb0db target/riscv: Remove shift and slt insn manual decoding
a9a86c88f6 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
54d57a38f7 target/riscv: Move gen_arith_imm() decoding into trans_* functions
9d975c5ed2 target/riscv: Remove manual decoding from gen_store()
39a6ac4cc7 target/riscv: Remove manual decoding from gen_load()
bb3f1a9065 target/riscv: Remove manual decoding from gen_branch()
f6b0aa0eeb target/riscv: Remove gen_jalr()
922f5dfe8f target/riscv: Convert quadrant 2 of RVXC insns to decodetree
47d4169732 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b8fd40fa5d target/riscv: Convert quadrant 0 of RVXC insns to decodetree
aa08f561b9 target/riscv: Convert RV priv insns to decodetree
562ddec6c5 target/riscv: Convert RV64D insns to decodetree
1acdf9e129 target/riscv: Convert RV32D insns to decodetree
0ba2673905 target/riscv: Convert RV64F insns to decodetree
bf21af4f1e target/riscv: Convert RV32F insns to decodetree
4424cb5d0f target/riscv: Convert RV64A insns to decodetree
a2a5a1fb76 target/riscv: Convert RV32A insns to decodetree
b771102bf5 target/riscv: Convert RVXM insns to decodetree
e5c1995421 target/riscv: Convert RVXI csr insns to decodetree
5c0d5ac46f target/riscv: Convert RVXI fence insns to decodetree
5ac13d90b5 target/riscv: Convert RVXI arithmetic insns to decodetree
246245dbc4 target/riscv: Convert RV64I load/store insns to decodetree
b3ff5b70fb target/riscv: Convert RV32I load/store insns to decodetree
5d5c02adda target/riscv: Convert RVXI branch insns to decodetree
2888a8cc40 target/riscv: Activate decodetree and implemnt LUI & AUIPC
9a5764e348 target/riscv: Move CPURISCVState pointer to DisasContext
=== OUTPUT BEGIN ===
1/35 Checking commit 9a5764e348ca (target/riscv: Move CPURISCVState pointer to
DisasContext)
2/35 Checking commit 2888a8cc4045 (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 2/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/35 Checking commit 5d5c02adda8d (target/riscv: Convert RVXI branch insns to
decodetree)
4/35 Checking commit b3ff5b70fb2d (target/riscv: Convert RV32I load/store insns
to decodetree)
5/35 Checking commit 246245dbc443 (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 5/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 5ac13d90b5b4 (target/riscv: Convert RVXI arithmetic insns
to decodetree)
7/35 Checking commit 5c0d5ac46f2f (target/riscv: Convert RVXI fence insns to
decodetree)
8/35 Checking commit e5c19954210c (target/riscv: Convert RVXI csr insns to
decodetree)
9/35 Checking commit b771102bf538 (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 145 lines checked
Patch 9/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit a2a5a1fb7667 (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 188 lines checked
Patch 10/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 4424cb5d0f44 (target/riscv: Convert RV64A insns to
decodetree)
12/35 Checking commit bf21af4f1eae (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 416 lines checked
Patch 12/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 0ba2673905a4 (target/riscv: Convert RV64F insns to
decodetree)
14/35 Checking commit 1acdf9e12925 (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 373 lines checked
Patch 14/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 562ddec6c595 (target/riscv: Convert RV64D insns to
decodetree)
16/35 Checking commit aa08f561b932 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 16/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit b8fd40fa5d30 (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 227 lines checked
Patch 17/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
18/35 Checking commit 47d416973290 (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
19/35 Checking commit 922f5dfe8f10 (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
20/35 Checking commit f6b0aa0eebe6 (target/riscv: Remove gen_jalr())
21/35 Checking commit bb3f1a906551 (target/riscv: Remove manual decoding from
gen_branch())
22/35 Checking commit 39a6ac4cc710 (target/riscv: Remove manual decoding from
gen_load())
23/35 Checking commit 9d975c5ed265 (target/riscv: Remove manual decoding from
gen_store())
24/35 Checking commit 54d57a38f72d (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
25/35 Checking commit a9a86c88f628 (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
26/35 Checking commit 1e89edb0db52 (target/riscv: Remove shift and slt insn
manual decoding)
27/35 Checking commit 88ae76827f0b (target/riscv: Remove manual decoding of
RV32/64M insn)
28/35 Checking commit 6cb56750e21e (target/riscv: Rename trans_arith to
gen_arith)
29/35 Checking commit 10e50a6df34c (target/riscv: Remove gen_system())
30/35 Checking commit 868cd4fedd03 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 35b75fe79c93 (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 31/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
32/35 Checking commit 0f0ad0478bbc (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
33/35 Checking commit 65479e48d38a (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 309 lines checked
Patch 33/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 20585ad92fbf (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
35/35 Checking commit cc8505ed4b99 (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, (continued)
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree,
no-reply <=
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, no-reply, 2019/02/15
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/02/20