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[Savannah-hackers] savannah.gnu.org: submission of verilator - Verilog t
From: |
wsnyder |
Subject: |
[Savannah-hackers] savannah.gnu.org: submission of verilator - Verilog to SystemC |
Date: |
Fri, 04 May 2001 11:02:46 -0700 |
A package was submitted to savannah.gnu.org.
This mail was sent to address@hidden, address@hidden
If it already is an official GNU package, it will be approved shortly.
Otherwise it must be discussed on address@hidden for approval.
Wilson Snyder <address@hidden> described the package as follows:
License: other
Other License: GNU Lesser Public License. Parts of the program are covered by
the Perl Artistic License.
Package: verilator - Verilog to SystemC
System name: verilator
Verilator is a GPLed Verilog to C translator. Verilator converts
Synthesizable Verilog (a hardware description language) to SystemC
C++ code that is compiled with GCC, creating a simulator executable.
Verilator has been in development for 7 years, and there is renewed
interest by several people in different companies for continued development,
thus the need for this account.
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