[Simulavr-devel] OxFFFF opcodes

[ken restivo]

I've noticed that my "real" Atmel part seems to skip over 0xFFFF opcodes, 
and just proceed on to the next instruction. I've noticed this in testing 
my bootloader, and it also is hinted at in the Atmel databook, which 
mandates the insertion of .word 0xFFFF after any SPM instruction 
(to aid in pipelining, it says).

I've added the attached patch to simulate this behaviour of the real part. 

This is closer to what the actual chip does, but not 100% complete yet. 
It looks like the real chip also will roll the PC off the end of the 
flash and back to 0x0000 if a bug sends it into FFFF territory, i.e. 
past the end of the program. Haven't found any documentation of that, 
but so far it looks pretty reproductible.

-ken
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