[Viuavm-commits] [SCM] Viua VM branch issue/177/5534fb2a/implement-bit-manipulation-instructions updated. v0.9.0-118-g7ccddd8

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commit 7ccddd8fada6c7381869bd2178cb9717e6709243
Author: Marek Marecki <address@hidden>
Date:   Tue Jul 18 00:00:40 2017 +0200

    Fix bitwise "and", "or", and "xor" when using operands with different widths

commit 30e3d00f38bf3e0115bfcde71ae569743821b2c9
Author: Marek Marecki <address@hidden>
Date:   Mon Jul 17 23:59:57 2017 +0200

    Tests for bitwise "and", "or", and "xor" of operands with different widths

-----------------------------------------------------------------------

Summary of changes:
 .../{ashl_to_void.asm => bitand_with_different_widths.asm}    | 11 ++++++-----
 .../{ashl_to_void.asm => bitor_with_different_widths.asm}     | 11 ++++++-----
 .../{ashl_to_void.asm => bitxor_with_different_widths.asm}    | 11 ++++++-----
 src/types/bits.cpp                                            |  7 ++++---
 tests/tests.py                                                |  9 +++++++++
 5 files changed, 31 insertions(+), 18 deletions(-)
 copy sample/asm/bits/manipulation/{ashl_to_void.asm => 
bitand_with_different_widths.asm} (73%)
 copy sample/asm/bits/manipulation/{ashl_to_void.asm => 
bitor_with_different_widths.asm} (73%)
 copy sample/asm/bits/manipulation/{ashl_to_void.asm => 
bitxor_with_different_widths.asm} (73%)


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