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Total 38 documents matching your query.

21. [Qemu-devel] [Bug 1488363] Re: qemu 2.4.0 hangs using vfio for pci passthrough of graphics card (score: -20)
Author: HIDDEN
Date: Wed, 26 Aug 2015 15:55:58 -0500
I ran a bisect, and here's the result: target-i386: disable LINT0 after reset Due to old Seabios bug, QEMU reenable LINT0 after reset. This bug is long gone and therefore this hack is no longer neede
/archive/html/qemu-devel/2015-08/msg03281.html (9,552 bytes)

22. Re: [Qemu-devel] [Bug 1488363] Re: qemu 2.4.0 hangs using vfio for pci passthrough of graphics card (score: -20)
Author: HIDDEN
Date: Tue, 1 Sep 2015 09:24:36 +0200 (CEST)
Hi, proxmox users report same bug here with qemu 2.4: http://forum.proxmox.com/threads/23346-Proxmox-4b1-q35-machines-failing-to-reboot-problems-with-PCI-passthrough we are going to test with reverti
/archive/html/qemu-devel/2015-09/msg00011.html (10,043 bytes)

23. Re: [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -20)
Author: HIDDEN
Date: Tue, 15 Sep 2015 15:19:42 -0600
Please see bug: https://bugs.launchpad.net/qemu/+bug/1488363 Is this bug perhaps not as long gone as we thought, or is there something else going on here? Thanks, Alex
/archive/html/qemu-devel/2015-09/msg04190.html (6,543 bytes)

24. Re: [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -20)
Author: HIDDEN
Date: Wed, 16 Sep 2015 07:23:30 +0200
I would say, someone needs to check if the SeaBIOS line that is supposed to enable LINT0 is actually executed on one of the broken systems and, if not, why not. Jan -- Siemens AG, Corporate Technolog
/archive/html/qemu-devel/2015-09/msg04210.html (6,380 bytes)

25. Re: [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -20)
Author: HIDDEN
Date: Wed, 16 Sep 2015 08:47:56 +0200
There is only one reason (beside miscompiling seabios with CONFIG_QEMU=n) why seabios would skip acpi initialization, and that is apic not being present according to cpuid: cpuid(1, &eax, &ebx, &ecx,
/archive/html/qemu-devel/2015-09/msg04217.html (6,851 bytes)

26. Re: [Qemu-devel] [PATCH v2] Basic Intel IOMMU DMAR emulation (score: -32)
Author: HIDDEN
Date: Wed, 14 Apr 2010 21:28:20 +0300
I think the approach is not generic enough. Every device must be converted (which may be inevitable) but we are still limited to translation depth of one. With the same conversion effort, I'd like to
/archive/html/qemu-devel/2010-04/msg01003.html (69,638 bytes)

27. Re: [RFC for Linux] virtio_balloon: Add VIRTIO_BALLOON_F_THP_ORDER to handle THP spilt issue (score: -88)
Author: HIDDEN
Date: Tue, 31 Mar 2020 16:27:01 +0000
Yes, it does seem that we are missing __GFP_NORETRY. I really do not know what I was thinking when I did not add it for huge-pages allocation. I will send a patch. Thanks for noticing :) In regard t
/archive/html/qemu-devel/2020-03/msg09292.html (25,523 bytes)

28. Re: [RFC for Linux] virtio_balloon: Add VIRTIO_BALLOON_F_THP_ORDER to handle THP spilt issue (score: -88)
Author: HIDDEN
Date: Tue, 31 Mar 2020 16:37:44 +0000
AFAIK the hardware overheads of keeping huge-pages in the guest and backing them with 4KB pages are non-negligible. Did you take those into account?
/archive/html/qemu-devel/2020-03/msg09293.html (19,711 bytes)

29. [Qemu-devel] target-i386: clear bsp bit when designating bsp (score: -,100)
Author: HIDDEN
Date: Thu, 2 Apr 2015 02:58:36 +0300
Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it
/archive/html/qemu-devel/2015-04/msg00218.html (7,944 bytes)

30. [Qemu-devel] [PATCH 0/2] target-i386: disable LINT0 after reset and init (score: -,100)
Author: HIDDEN
Date: Mon, 13 Apr 2015 02:32:07 +0300
LINT0 is currently reenabled after reset to circumvent old seabios bug, which violates x86 specifications. This patch-set handles this issue, by removing the old hack from qemu and reporting to kvm t
/archive/html/qemu-devel/2015-04/msg01339.html (6,140 bytes)

31. [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -,100)
Author: HIDDEN
Date: Mon, 13 Apr 2015 02:32:08 +0300
Due to old Seabios bug, QEMU reenable LINT0 after reset. This bug is long gone and therefore this hack is no longer needed. Since it violates the specifications, it is removed. Signed-off-by: Nadav A
/archive/html/qemu-devel/2015-04/msg01340.html (6,538 bytes)

32. [Qemu-devel] [PATCH 2/2] target-i386: kvm: Disable KVM quirks (score: -,100)
Author: HIDDEN
Date: Mon, 13 Apr 2015 02:32:09 +0300
KVM has quirks to overcome legacy QEMU bugs that are already resolved. Using a new KVM feature for disabling these quirks. Signed-off-by: Nadav Amit <address@hidden> -- linux-headers/asm-x86/kvm.h |
/archive/html/qemu-devel/2015-04/msg01341.html (7,319 bytes)

33. Re: [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -,114)
Author: HIDDEN
Date: Wed, 16 Sep 2015 09:22:14 +0300
I would say, someone needs to check if the SeaBIOS line that is supposed to enable LINT0 is actually executed on one of the broken systems and, if not, why not. Jan -- Siemens AG, Corporate Technolo
/archive/html/qemu-devel/2015-09/msg04214.html (6,712 bytes)

34. Re: [Qemu-devel] [PATCH 1/2] target-i386: disable LINT0 after reset (score: -,114)
Author: HIDDEN
Date: Wed, 16 Sep 2015 15:52:38 +0300
I don’t happen to have a similar platform. On regular qemu/kvm runs with q35, I see APIC_LVT0 is set once to 0x8700 on the BSP - as expected: qemu-system-x86-19345 [011] d... 2583274.503018: kvm_en
/archive/html/qemu-devel/2015-09/msg04379.html (8,053 bytes)

35. Re: [Qemu-devel] [PATCH 2/2] target-i386: kvm: Disable KVM quirks (score: -,193)
Author: HIDDEN
Date: Mon, 13 Apr 2015 17:17:32 +0300
Of course… Do you want a v2 now, later (after 4.2), or would you change it yourself? Thanks, Nadav
/archive/html/qemu-devel/2015-04/msg01462.html (6,515 bytes)

36. [Qemu-devel] [PATCH] Basic Intel IOMMU DMAR emulation (score: -,202)
Author: HIDDEN
Date: Thu, 8 Apr 2010 03:58:31 +0300
This patch enables basic Intel IOMMU (VT-d) emulation for DMA remappings. Registers invalidation is supported, as well as partial queued invalidation. In addition the structure allows other IOMMU arc
/archive/html/qemu-devel/2010-04/msg00506.html (56,884 bytes)

37. [Qemu-devel] [PATCH v2] Basic Intel IOMMU DMAR emulation (score: -,202)
Author: HIDDEN
Date: Wed, 14 Apr 2010 13:21:07 +0300
This version addresses the compatibility issues raised by Paul Brooks, and loads the DMAR table without addition command line parameters. Caching-mode is now disabled (it's not required for the curre
/archive/html/qemu-devel/2010-04/msg00978.html (50,716 bytes)

38. Re: [Qemu-devel] [PATCH 2/2] target-i386: kvm: Disable KVM quirks (score: -,205)
Author: HIDDEN
Date: Mon, 13 Apr 2015 17:33:03 +0300
Anyhow, in that case the KVM patch is also wrong (not reporting KVM_CAP_DISABLE_QUIRKS is supported). I don’t want to spam, so I’ll run some tests and resubmit. Nadav
/archive/html/qemu-devel/2015-04/msg01463.html (7,212 bytes)


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