Re: [avr-chat] Cascading JTAG

[Uwe Bonnes]

>>>>> "Matt" ==   <address@hidden> writes:

    Matt> Hi All: Has anyone on this list successfully cascaded the JTAG
    Matt> ports of an ATMega128 and an Altera device? I'm having trouble
    Matt> with it at the moment, and I'm not sure whether the problem is
    Matt> with my dodgy hacked-up cascade cable, the software (javr and
    Matt> quartus), the particular device not supporting jtag fully (altera
    Matt> MAX7k, but actually need to know about altera epc2), or the pinout
    Matt> I'm using.

    Matt> The normal singly connected way is like this:

    Matt> Byteblaster TDO <-> AVR TDO AVR TDI <-> Byteblaster TDI

    Matt> And also:

    Matt> Byteblaster TDO <-> Altera TDO Altera TDI <-> Byteblaster TDI

    Matt> This works, even though my nomenclature may be wrong (it should
    Matt> probably be byteblaster TDO <-> AVR TDI etc). Anyway, using the
    Matt> same nomenclature, I'm trying an altera byteblaster MV with the
    Matt> following connection:

    Matt> Byteblaster TDO <-> Altera TDO Altera TDI <-> AVR TDO AVR TDI <->
    Matt> Byteblaster TDI

    Matt> So, it should work, in theory. However, I get a jtag chain
    Matt> incomplete error from both javr and quartus.

Scan the Atmega Data sheet for the erratas at the end. Atmel didn't get it
right for a long time. I don't know if actual chip revisions are fixed now,
the errata is unclear.

Bye
-- 
Uwe Bonnes                address@hidden

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