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[avr-gcc-list] GCC 3.0.2 unsigned int bug?

From: Chris Elmquist
Subject: [avr-gcc-list] GCC 3.0.2 unsigned int bug?
Date: Mon, 17 Dec 2001 14:06:09 -0600
User-agent: Mutt/1.2.5i

I'm new here... just playing around with avr-gcc 3.0.2 on

I'm having trouble understanding this:

void delay(void)
        unsigned int d;

        d = 0x1000;
        while (d) d--;

generates this code (using avr-objdump --disassemble):

0000004a <delay>:
  4a:   80 e0           ldi     r24, 0x00       ; 0
  4c:   90 e1           ldi     r25, 0x10       ; 16
  4e:   80 50           subi    r24, 0x00       ; 0
  50:   94 40           sbci    r25, 0x04       ; 4
  52:   e9 f7           brne    .-6             ; 0x4e
  54:   08 95           ret

I can clearly see that the MSB goes in r25 and the LSB in r24
but then why does it subtract 0x04 from the MSB each iteration?

Suspecting maybe a disassembler problem, the '94 40' opcode
indeed would subtract 0x40 from the MSB wouldn't it?

Am I missing something obvious here or is this a bug?

Chris Elmquist      mailto:address@hidden     http://www.pobox.com/~chrise

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