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AW: [avr-gcc-list] Oh why....


From: Stumpf Michael
Subject: AW: [avr-gcc-list] Oh why....
Date: Mon, 25 Nov 2002 14:57:10 +0100

no fault by compiler, rathjer well-done
1.
the op-code LSL Rd is just a synonym for ADD Rd,Rd, see doc of instruction set
2.
the op-code LSL Rd only shift one bit per time, so l1 <<= 6; would reqire six single
LSL instructions rather than 4 using the swap insn

regards

> -----Urspr√ľngliche Nachricht-----
> Von: Tvrtko A. Ursulin [mailto:address@hidden]
> Gesendet: Donnerstag, 21. November 2002 18:01
> An: address@hidden
> Betreff: [avr-gcc-list] Oh why....
>
>
>
> Please look at this piece of code:
>
> void    lcd_at(uint8_t line, uint8_t col)
> {
>  4e8:   36 2f           mov     r19, r22
>         uint8_t adr  = col;
>
>         uint8_t l1 = line&1;
>  4ea:   28 2f           mov     r18, r24
>  4ec:   21 70           andi    r18, 0x01       ; 1
>         uint8_t l2 = line&2;
>  4ee:   82 70           andi    r24, 0x02       ; 2
>         l1 <<= 6;
>  4f0:   22 95           swap    r18
>  4f2:   22 0f           add     r18, r18
>  4f4:   22 0f           add     r18, r18
>  4f6:   20 7c           andi    r18, 0xC0       ; 192
>         l2 <<= 3;
>  4f8:   88 0f           add     r24, r24
>  4fa:   88 0f           add     r24, r24
>  4fc:   88 0f           add     r24, r24
>         adr |= l1 | l2;
>  4fe:   28 2b           or      r18, r24
>  500:   32 2b           or      r19, r18
>
>         lcd_address(adr);
>  502:   30 68           ori     r19, 0x80       ; 128
>  504:   83 2f           mov     r24, r19
>  506:   b8 df           rcall   .-144           ; 0x478
> }
>  508:   08 95           ret
>
> Compiler doesn't like LSR/LSL so he rather spends 3(4) cycles
> instead of 1?
>
> I am confused...totally....
>
>
> avr-gcc-list at http://avr1.org
> avr-gcc-list at http://avr1.org
>


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