[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [avr-gcc-list] swap bits
From: |
Christian Ludlam |
Subject: |
Re: [avr-gcc-list] swap bits |
Date: |
Tue, 21 Jan 2003 19:02:28 +0000 |
User-agent: |
POPstar/2.02 |
On 21 Jan Klaus Rudolph wrote:
> 51 cycles total without wasting any register.
> 10 words flash.
> 51 cycles is very expensive. Any better ideas here :-)
Which processor is this running on?
You could use a table lookup in 4 bits to reduce flash usage - this code
requires an architecture with enhanced LPM addressing modes:
; E r16 = byte
; X r16 = reversed byte
reverse_byte
ldi ZL,(table * 2) & 0xff ; 1
ldi ZH,(table >> 7) ; 1
;
mov r0,r16 ; 1
andi r16,0x0f ; 1
add ZL,r16 ; 1
adc ZH,__zero_reg__ ; 1
mov r16,r0 ; 1
lpm R0,Z ; 2
;
ldi ZL,(table * 2) & 0xff ; 1
ldi ZH,(table >> 7) ; 1
;
swap r16 ; 1
andi r16,0x0f ; 1
add ZL,r16 ; 1
adc ZH,__zero_reg__ ; 1
lpm R16,Z ; 2
;
swap r0 ; 1
or r16,r0 ; 1
table db 0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15
Total 20 cycles, 24 flash words. You could optimise it further by ensuring
the table doesn't cross a page boundary and removing the adc instructions.
--
Christian Ludlam
address@hidden
avr-gcc-list at http://avr1.org