RE: [avr-gcc-list] movw and asm

[Rune Christensen]

Hello

I have found the following about the movw

MOVW– Copy RegisterWord
Description:
This instruction makes a copy of one register pair into another register
pair. The source register pair Rr+1:Rr is left
unchanged, while the destination register pair Rd+1:Rd is loaded with a copy
of Rr + 1:Rr.
This instruction is not available in all devices. Refer to the device
specific instruction set summary.

Operation:
(i) Rd+1:Rd = Rr+1:Rr
Syntax: Operands: Program Counter:
(i) MOVW Rd+1:Rd,Rr+1Rr d = {0,2,...,30}, r = {0,2,...,30} PC = PC + 1

Example:
movw r17:16,r1:r0 ; Copy r1:r0 to r17:r16
call check ; Call subroutine
...
check: cpi r16,$11 ; Compare r16 to $11
...
cpi r17,$32 ; Compare r17 to $32
...
ret ; Return from subroutine

Words: 1 (2 bytes)
Cycles: 1

I found the following from the avr-libc-manual

• Function call conventions:
Arguments - allocated left to right, r25 to r8. All arguments are aligned to
start in
even-numbered registers (odd-sized arguments, including char, have one free
register above them). This allows making better use of the movw instruction
on
the enhanced core.
If too many, those that don’t fit are passed on the stack.
Return values: 8-bit in r24 (not r25!), 16-bit in r25:r24, up to 32 bits in
r22-r25,
up to 64 bits in r18-r25. 8-bit return values are zero/sign-extended to 16
bits by
the caller (unsigned char is more efficient than signed char - just clr
r25). Arguments to functions with variable argument lists (printf etc.) are
all
passed on stack, and char is extended to int.


Best Regards
Rune Christensen

-----Original Message-----
From: address@hidden
[mailto:address@hidden Behalf Of James Dabbs
Sent: Tuesday, August 05, 2003 10:14 PM
To: address@hidden
Subject: [avr-gcc-list] movw and asm


I am interested in using the movw instruction in inline assembler.  I am
working on several 32-bit values as "r" parameters, but right now I have no
way of knowing whether %a0,%b0,%c0,%d0 is aligned in any way on register
boundaries or whether they are organized sequentially or what.  Using movw
could save me about 10% performance and I am down to counting cycles on a
16-mhz part.

Any "assemble time" or "compile time" test to figure out whether the
compiler has placed these values on lucky boundaries would work.  Also, if
the compiler has conventions about where these things are located, that
could work too.  I have found nothing on the net.

Any help would be greatly appreciated!

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