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[avr-gcc-list] Trying to learn Interrupts


From: Laszlo
Subject: [avr-gcc-list] Trying to learn Interrupts
Date: Sat, 03 Jul 2004 13:17:20 -0700
User-agent: Mozilla/5.0 (Windows; U; Windows NT 5.0; en-US; rv:1.6) Gecko/20040113

OK, I'm a coder of PC assembly, so I "get" Interrupts. But when it comes to my 2313 I'm having trouble; possibly of a timing veriety, I'm not sure. Note - I'm doing this is in assembly.

I'm having what looks like INT0 and INT1 stepping on each others' time, but the cycles count of the two interrupt handles don't support that. INT0 is supposed to trigger and complete, then INT1 triggers and completes. There should be plenty of time for this, but in practice it doesn't work out.

I'm enabling both INT0 and INT1 interrupts. They both watch the same data, one triggering on the rising edge, one on the falling edge. The data is a square wave of wildly varying periods, from 500us to 20ms. I'm also running timer 0. The purpose is to record timer values for each of the changes.

INT0 and INT1 do basically the same thing, storing TCNT1L and TCNT1H to SRAM via an "st X+". I'm also doing a "set" and "clt" and 9 "rol"s on 9 registers just to get a report of how many ups and how many downs there have been. Everything works OK if I take out the two st's in each int handler, but with all the code in place I get about 95% INT0 triggers and 5% INT1 triggers. The two INT pins are tied together, so electrically it's 50/50.

Each INT interrupt handler is 23 cycles, including 4 each for the irq and the reti. At 10MHz each trigger should take 2.3us. With a minimum period on the data being watched of 500us, I should have enough clock cycles to call each handler more than 200 times.

...no?

Thanks for any advice.
(and yes, there are other, possibly better, ways to do this - the point of the project is to learn avr interrupts)
Laszlo

----------------
ext_int_0:
   in r16,TCNT1H
   st X+,r16
   in r16,TCNT1L
   st X+,r16

rol r0; rol r1; rol r2; rol r3; rol r4; rol r5; rol r6; rol r7; rol r8; rol r9;
   clt
   bld r0,0

   reti

ext_int_1:
   in r16,TCNT1H
   st X+,r16
   in r16,TCNT1L
   st X+,r16

rol r0; rol r1; rol r2; rol r3; rol r4; rol r5; rol r6; rol r7; rol r8; rol r9;
   set
   bld r0,0

   reti
----------------
I should always get 9 registers full of "...010101010101010101010101010101..."
In stead, I get 9 registers full of "...000000000001001000000000000010..."
UNLESS...I take out the two "st X,TCNT1x" lines. If I do that it works great.

(I can supply more code, but this is it for the INT handling)

--
"That's the last time *I* answer to the name 'Sarah Conner'!" - me



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