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Re: [avr-gcc-list] custom signal prologue

From: Christian Troedhandl
Subject: Re: [avr-gcc-list] custom signal prologue
Date: Tue, 23 Nov 2004 14:26:09 +0100 (MET)

On Tue, 23 Nov 2004, Ben Mann wrote:

Hi all,

Is there any way to customise the prologue of an interrupt handler?

To explain...

I have a UDR interrupt handler in which I'd like to enable interrupts so
that another very time-critical interrupt can be handled promptly.

The usually accepted method does not work for UDR

    ...do something...

because as soon as sei is enabled another UDR interrupt immediately triggers
and hangs the processor.

An inefficient but workable solution in C appears to be:

   //Disable UDRIE
   ...do something...

The problem being that with complex replacements for "do something", the
prologue consists of pushing qutie a few registers. The trimmed .lst excerpt
below demonstrates the code the compiler generates for the first couple of
lines above in my application.


I think using the naked function attribute should do the trick:
void MyInterruptHandler(void) __attribute__ ((signal));
void MyInterruptHandler(void)
        /* do something */

void SIG_UART_DATA (void) __attribute__ ((naked));
void SIG_UART_DATA (void)
        uint8_t ucsrb;
        asm volatile ("push %0\n\t" : "=r" (ucsrb) :);
        //Disable UDRIE
        ucsrb = UCSRB;
        UCSRB = ucsrb & _BV(UDRIE);
        asm volatile ("pop %0\n\t" : "=r" (ucsrb) :);
        asm volatile("ret\n\t" : :);

resulting in:
0000008e <MyInterruptHandler>:
  8e:   1f 92           push    r1
  90:   0f 92           push    r0
  92:   0f b6           in      r0, 0x3f        ; 63
  94:   0f 92           push    r0
  96:   11 24           eor     r1, r1
  98:   0f 90           pop     r0
  9a:   0f be           out     0x3f, r0        ; 63
  9c:   0f 90           pop     r0
  9e:   1f 90           pop     r1
  a0:   18 95           reti

000000a2 <__vector_12>:
  a2:   8f 93           push    r24
  a4:   8a b1           in      r24, 0x0a       ; 10
  a6:   80 72           andi    r24, 0x20       ; 32
  a8:   8a b9           out     0x0a, r24       ; 10
  aa:   78 94           sei
  ac:   8f 91           pop     r24
  ae:   0e 94 47 00     call    0x8e
  b2:   08 95           ret

Christian Troedhandl                   mailto:address@hidden
Real-Time Systems Group                     voice:+43 (1) 58801-58210
Vienna University of Technology
A-1040 Wien, Treitlstr. 3/182-1        http://www.vmars.tuwien.ac.at/

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