[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [avr-gcc-list] question about SBI and CBI from avr-gcc

From: Ben Mann
Subject: RE: [avr-gcc-list] question about SBI and CBI from avr-gcc
Date: Mon, 29 Nov 2004 13:20:38 +0800

The AVR assembly instructions for sbi/cbi only work for a limited set of
registers (0 <= A <= 31), which accounts for a few cases where we look at
the .lst file and scratch our collective heads.

In addition, from my observations, winavr will generate the shorter/faster
of sbi/cbi and read/modify/write based on how many bits are being set.


PORTA |= _BV(PA0)|_BV(PA1)|_BV(PA2)|_BV(PA3);

is clearly more efficient as 3 instructions (in/ori/out) than as 4 sbi

A single change of porta "might" become an sbi instruction, but then that's
based on whether PORTA is in the lower 32 I/O registers on your specific

Ben Mann

PS I would guess that they're deprecated because of the hardware dependence
and consequential un-portability of the C code...

-----Original Message-----
From: address@hidden [mailto:address@hidden
On Behalf Of James Washer
Sent: Monday, 29 November 2004 12:57 PM
To: address@hidden
Subject: [avr-gcc-list] question about SBI and CBI from avr-gcc

I've noticed the the avr-libc docs report cbi/sbi as being decremented, and
suggest using direct access. However I see the the compiler generates a
read/modify/write three instruction sequence.  Is there an "accpted" way to
generate a CBI and/or SBI instruction from C code without resorting to
inline assembly? Any reason libc deprecated these?


 - jim

avr-gcc-list mailing list
address@hidden http://www.avr1.org/mailman/listinfo/avr-gcc-list

reply via email to

[Prev in Thread] Current Thread [Next in Thread]