On Jan 6, 2005, at 12:58 PM, E. Weddington wrote:
Anton Erasmus wrote:
So why is this option used in the example makefile. I would have
thought that with the
avr being an 8-bit architecture that structures would automatically
be packed, as there
is no advantage in accessing non-byte alligned data compared to
accessing byte alligned data.
Um, perhaps just being paranoid? Seemed like a good thing to do at
the time? It shouldn't hurt anything to have it in?
Anybody have any other reasoning they'd like to throw around? :-)
Many compilers choose to align on the size of the data type, rather on
the size of the underlying architecture. This is done so that a data
item that might be larger than a word does not span a cache line
boundary, which can hurt performance measurably. So for an 8-byte
quantity like a double precision floating point or long long (on most
architectures), it is aligned on an 8-byte boundary. Therefore on AVR,
a 16-bit integer is likely to be aligned on a 2-byte boundary,
regardless of the fact that the memory is byte addressable and the
registers are 8 bits (and there is no cache). There are many
desktop-class assumptions in GCC. They work fairly well for
desktop-class processors, but really suck when it comes to compiling
for an 8-bit mcu.