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Re: AW: [avr-gcc-list] gcc prolog incorrect?

From: Ben L. Titzer
Subject: Re: AW: [avr-gcc-list] gcc prolog incorrect?
Date: Mon, 7 Mar 2005 13:40:17 -0800

On Mar 7, 2005, at 1:24 PM, Oliver Schulz wrote:


On Mar 7, 2005, at 8:45 AM, address@hidden wrote:

So what happens if we get interrupt between 69 and 70? And that
interrupt disables interrupts?

In that case, the interrupt handler is broken, since when it
returns it should restore the interrupt mask to the value it
had before the interrupt was taken.

Sorry, I can not follow you. How is the interrupt handler "broken"?

If an interrupt handler returns with the instruction "reti" the global
interrupt flag is always enabled.
In line 69 the SREG register is stored in tmp_reg (i.e. r1), which is saved
and restored by the prolog/epilog of the interrupt handler.

In any case, the interrupt handler saves and restores also the SREG
register, so I can't really see the problem...

The interrupt handler should be written with the assumption that it can occur between any two instructions (in non-critical parts of the program, of course). For example, between an arithmetic instruction that modifies the SREG flags and a branch instruction that depends on the values of those flags. It would therefore be unsafe for the interrupt handler to not restore these flags faithfully before it returns, since it would alter the behavior of the code it interrupted. Since the I flag is part of that state, it should also restore the I flag correctly. And, since the interrupt handler was actually triggered (i.e. the processor handled an interrupt), then that means at the point of the interrupt the I flag was true, and therefore RETI setting I back to true is correct and safe.

Deviation from this behavior would be "broken" then.



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