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Re: [avr-gcc-list] interrupts

From: Parthasaradhi Nayani
Subject: Re: [avr-gcc-list] interrupts
Date: Thu, 17 Mar 2005 16:40:24 -0800 (PST)


The problem of the chip locking up will occur if
interrupts occur too fast irrespective of whether you
use SIGNAL or INTERRUPT. In SIGNAL all interrups are
disabled till the current one is completed and while
exiting from ISR, global interrupts re-enabled.
Whereas in INTERRUPT, global inteerupts are re-enabled
as soon as the ISR is entered. This allows any other
interrupt to interrupt the processor, while it is
executing the current ISR.

The prpoblem here does not seem to be the way
interrupts are enabled, but more on the frequency of
interrupts. While the processor is executing the
interrupt, if a next interrupt comes, then the
follwing two scenarios can occur

1. if INTERRUPT is used then there will be stack over
flow and you are sure of processor going into a spin.

2. if SIGNAL is used, one ISR will be executed and as
soon as control comes out of this ISR the second ISR
will be executed and this will go on for ever, no
stack over flows will occur but processor will have no
time to execute the main code. I think this is what is
happening in your case. Which means the time taken to
execute the ISR and the time interval between two
interrupts is very very close or over lap.

SO solution, provide enough time between


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