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Re: [avr-gcc-list] SIGNAL or INTERRUPT ?!

From: User Tomdean
Subject: Re: [avr-gcc-list] SIGNAL or INTERRUPT ?!
Date: Sun, 4 Sep 2005 06:33:23 -0700 (PDT)

In the ATmega16 application I previously mentioned in the 'Using X and
Z register in global variables' discussion, I used

void SIG_ADC (void) __attribute__ ((naked));
void SIG_ADC (void) {
  register uint8_t tmp;
  register uint8_t HEAD_hi asm ("r31");
  tmp = SREG;
  asm("in r6, %0\n"
      "st Z+, r6\n"
  /* a byte compare will do, avoid the extra instruction with */
  if (HEAD_hi > 0x04) {
        HEAD = (uint8_t *)0x0100;  /* never actually do this */
  SREG = tmp;

to make the ISR as fast as possilbe.

I overclock the ADC to 2 mHz and get an interrupt every 6.2 uSec.  The
high byte of the left justified adc seems stable.

If the ISR is time critical, omit the 'call ...' and make everything
inline.  I use avr-objdump to tune the ISR.

The application is small, so I used avr-objdump and grep to verify
there are no conflicts in the use of Z, and, in main(), X.  The whole
application is 0x0129 bytes.


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