Re: [avr-gcc-list] how to infer lsl instruction...

[Lars Noschinski]

* varsha <address@hidden> [2005-11-16 09:54]:
> __asm__ __volatile__      
>   (           
>    "lsl r11"    "\n\t" 
>    "rol r12"    "\n\t" 
>    "rol r13"    "\n\t" 
>    "rol r15"
>   );
>
> but compiler doesn't generate lsl instruction...
> it generates something like this..
>
>    1514: bb 0c        add r11, r11
>    1516: cc 1c        adc r12, r12
>    1518: dd 1c        adc r13, r13
>    151a: ff 1c        adc r15, r15

Look at the Atmel AVR instruction set datasheet, and you will see, that
"lsl r" and "rol r" have the same opcodes as "add r,r" and "adc r,r".

The compiler outputs exactly the inline assembly you entered, but you
are looking at the disassembler output. And the disassembler has no way
to know, which mnemonic was used in the source code.