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Re: [avr-gcc-list] how to infer lsl instruction...

From: Eric Pasquier
Subject: Re: [avr-gcc-list] how to infer lsl instruction...
Date: Wed, 16 Nov 2005 10:42:08 +0100

If you take a look to the "8-bits AVR Instruction Set" document, you can see that "LSL Rd" is implemented as "ADD Rd,Rd", and "ROL Rd" as "ADC Rd,RD".
There are no specific instructions LSL or ROL.
Welcome to the RISC world (REDUCED Instruction Set Computers) !

Best regards,

----- Original Message ----- From: "Royce Pereira" <address@hidden>
To: "varsha" <address@hidden>; <address@hidden>
Sent: Wednesday, November 16, 2005 9:16 AM
Subject: Re: [avr-gcc-list] how to infer lsl instruction...

On Wed, 16 Nov 2005 13:00:03 +0530, varsha <address@hidden> wrote:

Hello all,
i'm using avr-gcc (GCC) 3.4.3 compiler and Atmega 16 as a MCU.

for crc calculation i'm using inline assembly code.
for example..

__asm__ __volatile__
    "lsl r11"    "\n\t"
    "rol r12"    "\n\t"
    "rol r13"    "\n\t"
    "rol r15"

but compiler doesn't generate lsl instruction...
it generates something like this..

    1514: bb 0c        add r11, r11
    1516: cc 1c        adc r12, r12
    1518: dd 1c        adc r13, r13
    151a: ff 1c        adc r15, r15

so what should do to if i want compiler to generate lsl instruction.

If the bytes & execution time is the same, why should make any difference, as long as it acheives the same result. Left shift is the same as multiplying by 2, which is the same as adding a value to itself. Hence the resulting code.


thank you,

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