[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [avr-gcc-list] Re: C vs. assembly performance

From: Nicholas Vinen
Subject: Re: [avr-gcc-list] Re: C vs. assembly performance
Date: Sun, 01 Mar 2009 00:21:12 +1100
User-agent: Thunderbird (X11/20090103)

Parthasaradhi Nayani wrote:
From: Nicholas Vinen <address@hidden>

 For example, things like "unsigned char x, y;
x = y>>4" could
use the nibble swap instruction rather than four shifts,
and things like

Shifting a byte or int right or left must push in 00s from the other side so swapping a nibble is not the right thing to do. So is the case with other examples. Correct me if I am wrong.


Yes, it has to blank the top 4 bits, but I believe it's still faster to swap the nibble and do that than four shifts. Something like:

LDI $15, r2
AND r2, r1

This is three instructions and three cycles, as opposed to:

LSR r1
LSR r1
LSR r1
LSR r1

which is four instructions and cycles. The former requires a spare register but that generally isn't a problem.

This is just an example. I didn't note them down at the time but I saw the compiler doing a lot of things the "long way" when there was a simple, faster, smaller way to do it. The case of accessing some of the bytes in a larger type via shifting was particularly annoying. Perhaps a union would have solved that, but it seems silly to have to resort to doing it that way.

Now that I've signed up to this list, if and when I come across avr-gcc missing obvious optimisations I'll report them.


reply via email to

[Prev in Thread] Current Thread [Next in Thread]