avr-gcc-list
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [avr-gcc-list] Compiler error creating ISR prologue?


From: David A. Lyons
Subject: Re: [avr-gcc-list] Compiler error creating ISR prologue?
Date: Sat, 14 Aug 2010 22:31:22 -0700

Yes, CLR affects SREG (S, V, N, Z).

See <http://www.atmel.com/dyn/resources/prod_documents/doc0856.pdf>
        page 11 (Instruction Set Summary)
        page 54 (CLR – Clear Register)

CLR is just a convenient shorthand for EOR, where the two operands happen to be 
the same register.

Cheers,

--Dave

On Aug 14, 2010, at 1:39 AM, darkschine wrote:

> 
> Are you sure that "clr" has an impact on SREG? I think you should double
> check...
> 
> 
> Johannes Bauer wrote:
>> 
>> On 12.08.2010 18:13, Johannes Bauer wrote:
>> 
>>> This appears to be strange to me. The "clr r1" instruction should IMO be
>>> placed after the first "push r0" instruction.
>> 
>> You are wrong, Johannes. It appears to you that the "clr r1" instruction 
>> should be placed after the SREG has been pushed (obviously, as clr also 
>> clears the SREG flags).
>> 
>> But otherwise, I still think there's a bug :-)
>> 
>> Regards,
>> Johannes
>> 
>> _______________________________________________
>> AVR-GCC-list mailing list
>> address@hidden
>> http://lists.nongnu.org/mailman/listinfo/avr-gcc-list
>> 
>> 
> 
> -- 
> View this message in context: 
> http://old.nabble.com/Compiler-error-creating-ISR-prologue--tp29420432p29435581.html
> Sent from the AVR - gcc mailing list archive at Nabble.com.
> 
> 
> _______________________________________________
> AVR-GCC-list mailing list
> address@hidden
> http://lists.nongnu.org/mailman/listinfo/avr-gcc-list




reply via email to

[Prev in Thread] Current Thread [Next in Thread]