[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Axiom-developer] Directions

From: William Sit
Subject: Re: [Axiom-developer] Directions
Date: Sat, 04 Jul 2015 11:33:58 -0400

Dear Tim:

I don't have pointers applying FPGA techniques to symbolic computations. However, the trend is to use something similar to FPGA all the way down to the manufacture level. For some background, see Qualcomm, for example already licenses this technology, as do many other companies. Their idea is to tailor each individual chip at the single consumer level to enhance security.

By the way, the link
is not readable by Adobe or Preview on Macs.

However, according to your link (scroll down to bottom), the abstract mentions: " This thesis describes the process of implementing an accelerator in which the computational part is specified using the functional hardware description language C╬╗aSH and discusses the feasibility of performing numerical mathematics on this accelerator by computing approximations to ordinary differential equations. The accelerator is capable of using the methods of Euler and Runge-Kutta (second order) to perform the approximations, but due to the use of a fixed-point number representation the accuracy suffers."

So this is mainly a numerical set up. Graphics processors have been used for numerical scientific work for a long time already since GPUs have improved tremendously in power (my layman observation is the advance is faster than CPUs in terms of number of cores, speed, and low power consumption).

Since Axiom is software, I am not sure how the technique may be applied, unless you are thinking about an Axiom chip, or some hybrid numerical-symbolic approach is used. However, Axiom is a relatively small system (compared to modern mammoth bloated software), and I think the priority should be to make Axiom's learning curve less steep than make Axiom run faster, or even more securely.


On Sat, 4 Jul 2015 10:13:18 -0500
 address@hidden wrote:
I've been spending a lot of time working on Field Programmable Gate Arrays (FPGAs) which is basically hardware that can be reprogrammed.

There have been some interesting developments in this area.
First, FPGAs are a lot more powerful and much cheaper.

Second, Intel just bought the second largest FPGA company, Altera.

Third, FPGAs are moving toward computational mathematics.

I believe, though I don't know for sure, that Intel will eventually put an FPGA fabric on the same chip (Sytem on a Chip, SoC) as their

Axiom is in a unique position to exploit this kind of hardware merger. If anyone has pointers to work on hardware-based symbolic/numeric
work, please send me a link.


Axiom-developer mailing list

William Sit, Professor Emeritus
Mathematics, City College of New York
Office: R6/291D Tel: 212-650-5179
Home Page:

reply via email to

[Prev in Thread] Current Thread [Next in Thread]