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arm vmsr bug?


From: Clive Davies
Subject: arm vmsr bug?
Date: Thu, 8 Mar 2012 14:37:51 +0000

Hi,

I think that there's a bug in the generation of ARM vmsr instructions in 
binutils 2.2. If I try to assemble:-

        mov     r0, #(0x1 << 30)
        vmsr    fpexc, r0

to enable the neon unit on a cortex-a9 then I get an error

        Error: operand 0 must be FPSCR -- `vmsr fpexc,r0'

Because in gas/config/tc-arm.c we have:-

static void
do_vmsr (void)
{
  unsigned Rt = inst.operands[1].reg;

  if (thumb_mode)
    reject_bad_reg (Rt);
  else if (Rt == REG_PC)
    {
      inst.error = BAD_PC;
      return;
    }

  if (inst.operands[0].reg != 1)
    first_error (_("operand 0 must be FPSCR"));

  inst.instruction |= (Rt << 12);
}

But, according to the ARM Architecture Reference Manual:-

        VMSR<c><q> <spec_reg>, <Rt>
        where:
        <c><q> See Standard assembler syntax fields on page A8-7.
        <spec_reg> Is one of:
        FPSID reg = '0000'
        FPSCR reg = '0001'
        FPEXC reg = '1000'.
        If the Common VFP subarchitecture is implemented, see Subarchitecture 
additions to the
        VFP system registers on page AppxB-15 for additional values of 
<spec_reg>.
        <Rt> The general-purpose register to be transferred to <spec_reg>.


I think this is a bug, unless there's some reason for disallowing fpsid & fpexc 
that I haven't found....

Thanks,
Clive

Clive Davies
Altera Europe


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