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[Bug ld/16017] LD creates invalid PLT instructions on CORTEX-M3
From: |
lotharlutz at gmx dot de |
Subject: |
[Bug ld/16017] LD creates invalid PLT instructions on CORTEX-M3 |
Date: |
Fri, 31 Jan 2014 18:30:32 +0000 |
https://sourceware.org/bugzilla/show_bug.cgi?id=16017
--- Comment #16 from Markus Mayer <lotharlutz at gmx dot de> ---
Will thinking about it, I came to the following conclusion (only line 2
differs). It safes 2 byte.
1: push {r0}
2: mov r0, pc
3: movw ip, #0x0000 ; Lower 16 bits of GOT entry offset from PC
4: movt ip, #0x0000 ; Upper 16 bits of GOT entry offset from PC
5: add ip, r0
6: pop {r0}
7: ldr.w pc, [ip]
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