[Bug binutils/21056] tic6x - erroneous disassembly of parallel instructions

[cvs-commit at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=21056

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot 
gnu.org> ---
The master branch has been updated by Nick Clifton <address@hidden>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8ec5cf65a8213988a9f861e6a94d12311e9b04c3

commit 8ec5cf65a8213988a9f861e6a94d12311e9b04c3
Author: Alexis Deruell <address@hidden>
Date:   Fri Jan 27 12:00:55 2017 +0000

    Fix disassembling of TIC6X parallel instructions where the previous fetch
packet ended with a 32-bit insn.

        PR 21056
    opcodes     * tic6x-dis.c (print_insn_tic6x): Correct displaying of
parallel
        instructions when the previous fetch packet ends with a 32-bit
        instruction.

    gas * testsuite/gas/tic6x/insns16-parallel.s: New test case.
        * testsuite/gas/tic6x/insns16-parallel.d: New test driver.

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