[Bug binutils/24739] RISC-V Disassembler should default to little endian

[wilson at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=24739

Jim Wilson <wilson at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |wilson at gcc dot gnu.org

--- Comment #2 from Jim Wilson <wilson at gcc dot gnu.org> ---
Big-endian support was recently added to the draft ISA spec, but it specifies
that code is always little-endian even when the processor is in big-endian
mode, like a few other systems.  So yes, we should always disassemble code as
little-endian.

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