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Make, suffix rules and pattern rules. (fwd)

From: Eli Zaretskii
Subject: Make, suffix rules and pattern rules. (fwd)
Date: Wed, 1 Nov 2000 10:35:15 +0200 (IST)

I've verified on my system that suffix rules with prerequisites do
seem to work, as in this example:

.c.o: foo.h
        @echo $<

Assuming you have foo.c and foo.h in your directory, type "make foo.o",
and see Make echo the name "foo.c".

Is something wrong with the assertion in the docs that "suffix rules
cannot have any prerequisites"?

The part with pattern rules, reported below as not working, does work
for me, so I'm guessing that the original Makefile included something
else which caused the pattern rules not to work.

---------- Forwarded message ----------
Date: Wed, 01 Nov 2000 04:25:53 +0100
From: Jerzy Klejnowski <address@hidden>
To: address@hidden
Newgroups: comp.os.msdos.djgpp
Subject: Make, suffix rules and pattern rules.


Maybe I don't understand 'make' documentation, but some things
I've tried seems to behave opposite to what I've read in it.

The documentation says:
   "Suffix rules cannot have any prerequisites of their own.  If they
have any, they are treated as normal files with funny names, not as
suffix rules."
And below that doc shows an example for '%.o: %.c foo.h' pattern rule
"which tells how to make `.o' files from `.c' files, and makes all `.o'
files using this pattern rule also depend on `foo.h'."

But pattern rule does not work for me, while suffix rule does...
Here's part of my makefile:

SHELL = bash
CFLAGS = -many -many -options
.SUFFIXES : .o .c .h

{various rules}
       @echo $<
        @$(CC) -c $(CFLAGS) $< -o $@

The results are:

  {various rules}          what 'make' does
  ------------------       -----------------
1  %.o : %.c                uses my rule
2  %.o : %.c header.h       uses predefined rule
3  .c.o :                   uses my rule
4  .c.o :  header.h         uses my rule

Can anybody explain it? Did I misunderstand the docs?

Thanks in advance.


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