make-3.79.1.tar.gz

[Gilbert, Peter]

This isn't a bug report, it's a request for a feature, which I'm willing to
implement and have folded into GNU make.

The problem is that some tools invoked by make produce multiple outputs, and
the only way I know to reasonably handle this is by misstating dependencies.
For example:

        # This actually produces foo.cpp and foo.h
        foo.cpp : foo.w
                ctangle -b foo.w - foo.cpp

        # bar.cpp #includes foo.h, but we instead say it depends on the
'primary' output of the ctangle
        bar.o : bar.cpp foo.cpp
                g++ -c -o bar.o bar.cpp

What I would instead propose is something along these lines.  The special
target .MULTIPLE will indicate that the new, variant behavior is desired.
Then whenever the commands for two or more targets are identical (after
expansion), make will assume that all the targets are made by the commands.
To implement this, make would keep the expanded commands for every target
being built; before building another target, it would check whether its
expanded commands are identical to some previous one, skipping this new
target if so.  (For parallel builds, the new target would have to wait for
completion of the previous commands, of course).

Or if you prefer, make could do the check only among targets that appear
together (as targets) in a rule, rather than for all goals.

Please comment on this feature request, and whether 3.79.1 is the
appropriate starting point for my efforts.  Thanks.

Note that this is in no way related to my professional work, but rather to
my thesis work.

Peter D Gilbert
TEL (508) 467-4352
address@hidden