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[bug #21661] Make expands command-line variable defnitions after/during

From: Robert Bogomip
Subject: [bug #21661] Make expands command-line variable defnitions after/during every command invocation
Date: Wed, 28 Nov 2007 19:07:10 +0000
User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-GB; rv:1.8.1.9) Gecko/20071105 Fedora/2.0.0.9-1.fc8 Firefox/2.0.0.9 pango-text 
Follow-up Comment #2, bug #21661 (project make):

I set $var on the command-line. Note that it is not mentioned _anywhere_
inside the Makefile, and yet it (or its expression) seems to be being expanded
whenever the Makefile runs a command --- _any_ and _all_ commands.

Expected behaviour? (Regression methinks.)

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